loglib

/*______________________________________________________________*/
/*								*/
/* LOG Library	: xilinx.def					*/
/* SCM Library	: xilinx.ddb					*/
/*								*/
/* Author	: Bartels System				*/
/* Last Revision: 97/04/15					*/
/*______________________________________________________________*/
/*								*/
/* This library includes circuit families manufactured by	*/
/* Xilinx such as						*/
/*								*/
/*	- Logic Cell Arrays					*/
/*								*/
/* NOTE:							*/
/*								*/
/* The part names used in this library DO NOT include suffixes	*/
/* referring to temperature range, timing constraints, plastic	*/
/* or ceramic DIL packages (as long as pin compatibility is	*/
/* maintained).							*/
/*______________________________________________________________*/

/*______________________________________________________________*/
/* FPGA Field Programmable Gate Arrays */

/* Programmierbares CMOS-Logikzellen-Array */
/* Programmable CMOS Logic Cell Array */

part lca_xc3020 : plcc68s {
	newattr "$comment" = "Programmable CMOS Logic Cell Array" ;
	newattr "$commentge" = "Programmierbares CMOS-Logikzellen-Array" ;
	newattr "$type" = "XC3020" ;
	newattr "$manufacturer" = "Xilinx" ;
	pin ( 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,16,17,18,19,20,
	     21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,
	     41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,
	     61,62,63,64,65,66,67,68) ;
	net "gnd" : ( 1) ;
	net "vcc" : (18) ;
	net "gnd" : (35) ;
	net "vcc" : (52) ;
	}

/* Programmierbares Zellen-Array / Programmable Cell Array */

part ca_xc1736 : dil8 {
	newattr "$comment" = "Programmable Cell Array / PROM" ;
	newattr "$commentge" = "Programmierbares Zellen-Array / PROM" ;
	newattr "$type" = "XC1736" ;
	newattr "$manufacturer" = "Xilinx" ;
	pin ( 1, 2, 3, 4, 5, 6, 7, 8) ;
	net "vcc" : ( 8) ;
	net "gnd" : ( 5) ;
	}

/*______________________________________________________________*/
/* Logical Library definition file end */

end.