loglib

/*______________________________________________________________*/
/*								*/
/* LOG Library	: micron.def					*/
/* SCM Library	: micron.ddb					*/
/*								*/
/* Author	: Bartels System				*/
/* Last Revision: 2005/02/15					*/
/*______________________________________________________________*/
/*								*/
/* This library includes circuit families manufactured by	*/
/* Micron Technology Inc. such as				*/
/*								*/
/*	- Memory Devices					*/
/*								*/
/* NOTE:							*/
/*								*/
/* The part names used in this library DO NOT include  suffixes	*/
/* referring to temperature range, timing constraints, plastic	*/
/* or ceramic DIL packages (as long as pin compatibility is	*/
/* maintained).							*/
/*______________________________________________________________*/

/*______________________________________________________________*/
/* Memory Devices */

/* Static Random Access Memory (SRAMs) */

part mt5c6404 : dil22 {
	newattr "$comment" = "CMOS SRAM 16k x 4" ;
	newattr "$type" = "MT5C6404" ;
	newattr "$manufacturer" = "Micron Technology" ;
	pin (dq1,dq2,dq3,dq4,/ce,/we) ;
	bus (abus) ;
	net "vcc" : (22) ;
	net "vss" : (11) ;
	xlat (dq1,dq2,dq3,dq4,/ce,/we)
	  to ( 13, 14, 15, 16, 10, 12) ;
	xlat ( abus.a0, abus.a1,abus.a2,abus.a3, abus.a4, abus.a5,
	       abus.a6, abus.a7,abus.a8,abus.a9,abus.a10,abus.a11,
	      abus.a12,abus.a13)
	  to (      17,      18,     19,     20,      21,       1,
	             2,       3,      4,      5,       6,       7,
	             8,       9) ;
	swap internal ( ((17,18,19,20,21, 1, 2, 3, 4, 5, 6, 7, 8, 9)) ) ;
	swap internal ( ((13,14,15,16)) ) ;
	}

part mt5c6408 : dil28,so28 {
	newattr "$comment" = "CMOS SRAM 8k x 8" ;
	newattr "$type" = "MT5C6408" ;
	newattr "$manufacturer" = "Micron Technology" ;
	pin (dq1,dq2,dq3,dq4,dq5,dq6,dq7,dq8,/ce1,ce2,/oe,/we) ;
	bus (abus) ;
	net "vcc" : (28) ;
	net "vss" : (14) ;
	xlat (dq1,dq2,dq3,dq4,dq5,dq6,dq7,dq8,/ce1,ce2,/oe,/we)
	  to ( 11, 12, 13, 15, 16, 17, 18, 19,  20, 26, 22, 27) ;
	xlat (abus.a0,abus.a1,abus.a2,abus.a3, abus.a4, abus.a5,
	      abus.a6,abus.a7,abus.a8,abus.a9,abus.a10,abus.a11,abus.a12)
	  to (     10,      9,      8,      7,       6,       5,
	            4,      3,     25,     24,      21,      23,       2) ;
	swap internal ( ((10, 9, 8, 7, 6, 5, 4, 3,25,24,21,23, 2)) ) ;
	swap internal ( ((11,12,13,15,16,17,18,19)) ) ;
	}

part mt5c2564 : dil24s {
	newattr "$comment" = "CMOS SRAM 64k x 4" ;
	newattr "$type" = "MT5C2564" ;
	newattr "$manufacturer" = "Micron Technology" ;
	pin (dq1,dq2,dq3,dq4,/ce,/we) ;
	bus (abus) ;
	net "vcc" : (24) ;
	net "vss" : (12) ;
	xlat (dq1,dq2,dq3,dq4,/ce,/we)
	  to ( 14, 15, 16, 17, 11, 13) ;
	xlat ( abus.a0, abus.a1, abus.a2, abus.a3, abus.a4, abus.a5,
	       abus.a6, abus.a7, abus.a8, abus.a9,abus.a10,abus.a11,
	      abus.a12,abus.a13,abus.a14,abus.a15)
	  to (       1,       2,       3,       4,       5,       6,
	             7,       8,       9,      10,      18,      19,
	            20,      21,      22,      23) ;
	swap internal ((( 1, 2, 3, 4, 5, 6, 7, 8, 9,10,18,19,20,21,22,23))) ;
	swap internal (((14,15,16,17))) ;
	}

/* DRAMs */

part mt46v16m16 : tssop66 {
	newattr "$comment" = "DDRAM 4M x 16 x 4" ;
	newattr "$commentge" = "DDRAM 4M x 16 x 4" ;
	newattr "$type" = "mt46v16m16" ;
	newattr "$manufacturer" = "Micron Technology" ;
	pin (/ras,/cas,/we,/cs,cke,ldm,udm,clk,/clk,vref,ldqs,udqs);
	pin ( a0, a1, a2, a3, a4, a5, a6, a7,
	      a8, a9,a10,a11,a12,    ba0,ba1);
	pin ( dq0, dq1, dq2, dq3, dq4, dq5, dq6, dq7,
	      dq8, dq9,dq10,dq11,dq12,dq13,dq14,dq15);
	xlat (/ras,/cas,/we,/cs,cke,ldm,udm,clk,/clk,vref,ldqs,udqs)
	  to (   23, 22, 21, 24, 44, 20, 47, 45,  46,  49,  16,  51);
	xlat ( a0, a1, a2, a3, a4, a5, a6, a7,
	       a8, a9,a10,a11,a12,    ba0,ba1)
	  to ( 29, 30, 31, 32, 35, 36, 37, 38,
	       39, 40, 28, 41, 42,     26, 27);
	xlat ( dq0, dq1, dq2, dq3, dq4, dq5, dq6, dq7,
	       dq8, dq9,dq10,dq11,dq12,dq13,dq14,dq15)
	  to (   2,   4,   5,   7,   8,  10,  11,  13,
	        54,  56,  57,  59,  60,  62,  63,  65);
	/* Power supply pins */
	net "vcc25" : (1,3,9,15,18,33,55,61);
	net "vss"   : (6,12,34,48,52,58,64,66);
	}

part mt46v32m16 : tssop66 {
	newattr "$comment" = "DDRAM 8M x 16 x 4" ;
	newattr "$commentge" = "DDRAM 8M x 16 x 4" ;
	newattr "$type" = "mt46v32m16" ;
	newattr "$manufacturer" = "Micron Technology" ;
	pin (/ras,/cas,/we,/cs,cke,ldm,udm,clk,/clk,vref,ldqs,udqs);
	pin ( a0, a1, a2, a3, a4, a5, a6, a7,
	      a8, a9,a10,a11,a12,    ba0,ba1);
	pin ( dq0, dq1, dq2, dq3, dq4, dq5, dq6, dq7,
	      dq8, dq9,dq10,dq11,dq12,dq13,dq14,dq15);
	xlat (/ras,/cas,/we,/cs,cke,ldm,udm,clk,/clk,vref,ldqs,udqs)
	  to (   23, 22, 21, 24, 44, 20, 47, 45,  46,  49,  16,  51);
	xlat ( a0, a1, a2, a3, a4, a5, a6, a7,
	       a8, a9,a10,a11,a12,    ba0,ba1)
	  to ( 29, 30, 31, 32, 35, 36, 37, 38,
	       39, 40, 28, 41, 42,     26, 27);
	xlat ( dq0, dq1, dq2, dq3, dq4, dq5, dq6, dq7,
	       dq8, dq9,dq10,dq11,dq12,dq13,dq14,dq15)
	  to (   2,   4,   5,   7,   8,  10,  11,  13,
	        54,  56,  57,  59,  60,  62,  63,  65);
	/* Power supply pins */
	net "vcc25" : (1,3,9,15,18,33,55,61);
	net "vss"   : (6,12,34,48,52,58,64,66);
	}

part mt46v64m16 : tssop66 {
	newattr "$comment" = "DDRAM 16M x 16 x 4" ;
	newattr "$commentge" = "DDRAM 16M x 16 x 4" ;
	newattr "$type" = "mt46v64m16" ;
	newattr "$manufacturer" = "Micron Technology" ;
	pin (/ras,/cas,/we,/cs,cke,ldm,udm,clk,/clk,vref,ldqs,udqs);
	pin ( a0, a1, a2, a3, a4, a5, a6, a7,
	      a8, a9,a10,a11,a12,a13,ba0,ba1);
	pin ( dq0, dq1, dq2, dq3, dq4, dq5, dq6, dq7,
	      dq8, dq9,dq10,dq11,dq12,dq13,dq14,dq15);
	xlat (/ras,/cas,/we,/cs,cke,ldm,udm,clk,/clk,vref,ldqs,udqs)
	  to (   23, 22, 21, 24, 44, 20, 47, 45,  46,  49,  16,  51);
	xlat ( a0, a1, a2, a3, a4, a5, a6, a7,
	       a8, a9,a10,a11,a12,a13,ba0,ba1)
	  to ( 29, 30, 31, 32, 35, 36, 37, 38,
	       39, 40, 28, 41, 42, 17, 26, 27);
	xlat ( dq0, dq1, dq2, dq3, dq4, dq5, dq6, dq7,
	       dq8, dq9,dq10,dq11,dq12,dq13,dq14,dq15)
	  to (   2,   4,   5,   7,   8,  10,  11,  13,
	        54,  56,  57,  59,  60,  62,  63,  65);
	/* Power supply pins */
	net "vcc25" : (1,3,9,15,18,33,55,61);
	net "vss"   : (6,12,34,48,52,58,64,66);
	}

part mt48lc16m16a2 : tsop54 {
	newattr "$comment" = "SDRAM 4M x 16 x 4" ;
	newattr "$commentge" = "SDRAM 4M x 16 x 4" ;
	newattr "$type" = "mt48lc16m16a2" ;
	newattr "$manufacturer" = "Micron Technology" ;
	pin (/ras,/cas,/we,/cs,cke,clk,dqml,dqmh);
	pin ( a0, a1, a2, a3, a4, a5, a6, a7,
	      a8, a9,a10,a11,a12,ba0,ba1    );
	pin ( dq0, dq1, dq2, dq3, dq4, dq5, dq6, dq7,
	      dq8, dq9,dq10,dq11,dq12,dq13,dq14,dq15);
	xlat (/ras,/cas,/we,/cs,cke,clk,dqml,dqmh)
	  to (  18,  17, 16, 19, 37, 38,  15,  39);
	xlat ( a0, a1, a2, a3, a4, a5, a6, a7,
	       a8, a9,a10,a11,a12,ba0,ba1    )
	  to ( 23, 24, 25, 26, 29, 30, 31, 32,
	       33, 34, 22, 35, 36, 20, 21    );
	xlat ( dq0, dq1, dq2, dq3, dq4, dq5, dq6, dq7,
	       dq8, dq9,dq10,dq11,dq12,dq13,dq14,dq15)
	  to (   2,   4,   5,   7,   8,  10,  11,  13,
	        42,  44,  45,  47,  48,  50,  51,  53);
	/* Power supply pins */
	net "vcc33" : (1,3,9,14,27,43,49);
	net "vss"   : (6,12,28,41,46,52,54);
	}

part mt48lc32m16a2 : tsop54 {
	newattr "$comment" = "SDRAM 8M x 16 x 4" ;
	newattr "$commentge" = "SDRAM 8M x 16 x 4" ;
	newattr "$type" = "mt48lc32m16a2" ;
	newattr "$manufacturer" = "Micron Technology" ;
	pin (/ras,/cas,/we,/cs,cke,clk,dqml,dqmh);
	pin ( a0, a1, a2, a3, a4, a5, a6, a7,
	      a8, a9,a10,a11,a12,ba0,ba1    );
	pin ( dq0, dq1, dq2, dq3, dq4, dq5, dq6, dq7,
	      dq8, dq9,dq10,dq11,dq12,dq13,dq14,dq15);
	xlat (/ras,/cas,/we,/cs,cke,clk,dqml,dqmh)
	  to (  18,  17, 16, 19, 37, 38,  15,  39);
	xlat ( a0, a1, a2, a3, a4, a5, a6, a7,
	       a8, a9,a10,a11,a12,ba0,ba1    )
	  to ( 23, 24, 25, 26, 29, 30, 31, 32,
	       33, 34, 22, 35, 36, 20, 21    );
	xlat ( dq0, dq1, dq2, dq3, dq4, dq5, dq6, dq7,
	       dq8, dq9,dq10,dq11,dq12,dq13,dq14,dq15)
	  to (   2,   4,   5,   7,   8,  10,  11,  13,
	        42,  44,  45,  47,  48,  50,  51,  53);
	/* Power supply pins */
	net "vcc33" : (1,3,9,14,27,43,49);
	net "vss"   : (6,12,28,41,46,52,54);
	}

/*______________________________________________________________*/
/* Logical Library definition file end */

end.