loglib /*______________________________________________________________*/ /* */ /* LOG Library : lsc.def */ /* SCM Library : lsc.ddb */ /* */ /* Author : Bartels System */ /* Last Revision: 2007/11/22 */ /*______________________________________________________________*/ /* */ /* This library includes circuit families manufactured by */ /* Lattice Semiconductor Corporation (LSC) such as */ /* */ /* - PLDs (Programmable Logic Devices) */ /* ispLSI 1016E pLSI 1016E */ /* ispLSI 1016 pLSI 1016 */ /* ispLSI 1024 pLSI 1024 */ /* ispLSI 1032E pLSI 1032E */ /* ispLSI 1048E pLSI 1048E */ /* ispLSI 1048EA pLSI 1048E */ /* ispLSI 2064VE */ /* ispLSI 5512VE */ /* ispLSI 8840 */ /* ispGAL 22V10AVLN */ /* - FPGAs (Field Programmable Gate Array Devices) */ /* LFECP6E-5TN144C */ /*______________________________________________________________*/ /*______________________________________________________________*/ /* PLDs / GALs - Programmable Logic Devices */ /* ispLSI - in-system programmable Large Scale Integration */ /* ispLSI and pLSI 1000/E Family */ part isplsi1016e : plcc44 { newattr "$comment" = "High Density PLD" ; newattr "$type" = "ispLSI 1016E" ; newattr "$manufacturer" = "Lattice Semiconductor Corporation" ; net "gnd" : ( 1,23) ; net "vcc" : (12,34) ; pin (in0,in1,in2,in3,y0,y1,y2,/ispen, io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31) ; xlat (in0,in1,in2,in3,y0,y1,y2,/ispen) to ( 14, 24, 36, 2,11,35,33, 13) ; xlat ( io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31) to ( 15, 16, 17, 18, 19, 20, 21, 22, 25, 26, 27, 28, 29, 30, 31, 32, 37, 38, 39, 40, 41, 42, 43, 44, 3, 4, 5, 6, 7, 8, 9, 10) ; } part plsi1016e : plcc44 { newattr "$comment" = "High Density PLD" ; newattr "$type" = "pLSI 1016E" ; newattr "$manufacturer" = "Lattice Semiconductor Corporation" ; net "gnd" : ( 1,23) ; net "vcc" : (12,34) ; net "vcc" : (13) ; pin (in0,in1,in2,in3,y0,y1,y2, io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31); xlat (in0,in1,in2,in3,y0,y1,y2) to ( 14, 24, 36, 2,11,35,33) ; xlat ( io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31) to ( 15, 16, 17, 18, 19, 20, 21, 22, 25, 26, 27, 28, 29, 30, 31, 32, 37, 38, 39, 40, 41, 42, 43, 44, 3, 4, 5, 6, 7, 8, 9, 10) ; } part isplsi1016 : plcc44 { newattr "$comment" = "High Density PLD" ; newattr "$type" = "ispLSI 1016" ; newattr "$manufacturer" = "Lattice Semiconductor Corporation" ; net "gnd" : ( 1,23) ; net "vcc" : (12,34) ; pin (in0,in1,in2,in3,y0,y1,y2,/ispen, io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31) ; xlat (in0,in1,in2,in3,y0,y1,y2,/ispen) to ( 14, 24, 36, 2,11,35,33, 13) ; xlat ( io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31) to ( 15, 16, 17, 18, 19, 20, 21, 22, 25, 26, 27, 28, 29, 30, 31, 32, 37, 38, 39, 40, 41, 42, 43, 44, 3, 4, 5, 6, 7, 8, 9, 10) ; } part isplsi1016ea : plcc44 { newattr "$comment" = "High Density PLD" ; newattr "$type" = "ispLSI 1016EA" ; newattr "$manufacturer" = "Lattice Semiconductor" ; net "vss" : ( 1,23) ; net "vcc" : (12,34) ; pin (in3,y0,y1,tdi,tdo,tms,tck,vccio, io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31) ; xlat (in3,y0,y1,tdi,tdo,tms,tck,vccio) to ( 2,11,35, 14, 24, 36, 33, 13) ; xlat ( io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31) to ( 15, 16, 17, 18, 19, 20, 21, 22, 25, 26, 27, 28, 29, 30, 31, 32, 37, 38, 39, 40, 41, 42, 43, 44, 3, 4, 5, 6, 7, 8, 9, 10) ; } part plsi1016 : plcc44 { newattr "$comment" = "High Density PLD" ; newattr "$type" = "pLSI 1016" ; newattr "$manufacturer" = "Lattice Semiconductor Corporation" ; net "gnd" : ( 1,23) ; net "vcc" : (12,34) ; /* net "vcc" : (13) ; */ pin (in0,in1,in2,in3,y0,y1,y2, io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31); xlat (in0,in1,in2,in3,y0,y1,y2) to ( 14, 24, 36, 2,11,35,33) ; xlat ( io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31) to ( 15, 16, 17, 18, 19, 20, 21, 22, 25, 26, 27, 28, 29, 30, 31, 32, 37, 38, 39, 40, 41, 42, 43, 44, 3, 4, 5, 6, 7, 8, 9, 10) ; } part isplsi1024 : plcc68 { newattr "$comment" = "High Density PLD" ; newattr "$type" = "ispLSI 1024" ; newattr "$manufacturer" = "Lattice Semiconductor Corporation" ; net "gnd" : ( 1,18,35,52) ; net "vcc" : (17,36,53,68) ; pin (in0,in1,in2,in3,in4,in5,y0,y1,y2,y3,/reset,/ispen, io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31, io32,io33,io34,io35,io36,io37,io38,io39, io40,io41,io42,io43,io44,io45,io46,io47) ; xlat (in0,in1,in2,in3,in4,in5,y0,y1,y2,y3,/reset,/ispen) to ( 21, 34, 49, 55, 2, 15,16,54,51,50, 20, 19); xlat ( io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31, io32,io33,io34,io35,io36,io37,io38,io39, io40,io41,io42,io43,io44,io45,io46,io47) to ( 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14) ; } part plsi1024 : plcc68 { newattr "$comment" = "High Density PLD" ; newattr "$type" = "pLSI 1024" ; newattr "$manufacturer" = "Lattice Semiconductor Corporation" ; net "gnd" : ( 1,18,35,52) ; net "vcc" : (17,36,53,68) ; /* net "vcc" : (19) ; */ pin (in0,in1,in2,in3,in4,in5,y0,y1,y2,y3,/reset, io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31, io32,io33,io34,io35,io36,io37,io38,io39, io40,io41,io42,io43,io44,io45,io46,io47) ; xlat (in0,in1,in2,in3,in4,in5,y0,y1,y2,y3,/reset) to ( 21, 34, 49, 55, 2, 15,16,54,51,50, 20); xlat ( io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31, io32,io33,io34,io35,io36,io37,io38,io39, io40,io41,io42,io43,io44,io45,io46,io47) to ( 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14) ; } part isplsi1032e : plcc84 { newattr "$comment" = "High Density PLD" ; newattr "$type" = "ispLSI 1032E" ; newattr "$manufacturer" = "Lattice Semiconductor Corporation" ; net "gnd" : ( 1,22,43,64) ; net "vcc" : (21,65) ; pin (in0,in1,in2,in3,in4,in5,in6,in7,y0,y1,y2,y3,/reset,/ispen, io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31, io32,io33,io34,io35,io36,io37,io38,io39, io40,io41,io42,io43,io44,io45,io46,io47, io48,io49,io50,io51,io52,io53,io54,io55, io56,io57,io58,io59,io60,io61,io62,io63) ; xlat (in0,in1,in2,in3,in4,in5,in6,in7,y0,y1,y2,y3,/reset,/ispen) to ( 25, 42, 44, 61, 67, 84, 2, 19,20,66,63,62, 24, 23) ; xlat ( io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31, io32,io33,io34,io35,io36,io37,io38,io39, io40,io41,io42,io43,io44,io45,io46,io47, io48,io49,io50,io51,io52,io53,io54,io55, io56,io57,io58,io59,io60,io61,io62,io63) to ( 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18) ; } part plsi1032e : plcc84 { newattr "$comment" = "High Density PLD" ; newattr "$type" = "ispLSI 1032E" ; newattr "$manufacturer" = "Lattice Semiconductor Corporation" ; net "gnd" : ( 1,22,43,64) ; net "vcc" : (21,65) ; net "vcc" : (23) ; pin (in0,in1,in2,in3,in4,in5,in6,in7,y0,y1,y2,y3,/reset, io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31, io32,io33,io34,io35,io36,io37,io38,io39, io40,io41,io42,io43,io44,io45,io46,io47, io48,io49,io50,io51,io52,io53,io54,io55, io56,io57,io58,io59,io60,io61,io62,io63) ; xlat (in0,in1,in2,in3,in4,in5,in6,in7,y0,y1,y2,y3,/reset) to ( 25, 42, 44, 61, 67, 84, 2, 19,20,66,63,62, 24) ; xlat ( io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31, io32,io33,io34,io35,io36,io37,io38,io39, io40,io41,io42,io43,io44,io45,io46,io47, io48,io49,io50,io51,io52,io53,io54,io55, io56,io57,io58,io59,io60,io61,io62,io63) to ( 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18) ; } /* part isplsi1032 : plcc84 ; part plsi1032 : plcc84 ; */ part isplsi1048e : pqfp128 { newattr "$comment" = "High Density PLD" ; newattr "$type" = "ispLSI 1048E" ; newattr "$manufacturer" = "Lattice Semiconductor Corporation" ; net "gnd" : (1,17,33,49,65,81,97,112) ; net "vcc" : (16,48,82,113) ; pin (in0,in1,in2,in3,in4,in5,in6,in7,in8,in9,in10,in11, y0,y1,y2,y3,/reset,goe0,goe1,/ispen, io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31, io32,io33,io34,io35,io36,io37,io38,io39, io40,io41,io42,io43,io44,io45,io46,io47, io48,io49,io50,io51,io52,io53,io54,io55, io56,io57,io58,io59,io60,io61,io62,io63, io64,io65,io66,io67,io68,io69,io70,io71, io72,io73,io74,io75,io76,io77,io78,io79, io80,io81,io82,io83,io84,io85,io86,io87, io88,io89,io90,io91,io92,io93,io94,io95) ; xlat (in0,in1,in2,in3,in4,in5,in6,in7,in8,in9,in10,in11, y0,y1,y2,y3,/reset,goe0,goe1,/ispen) to ( 20, 46, 47, 50, 51, 78, 84,110,111,115, 116, 14, 15,83,80,79, 19, 64, 114, 18) ; xlat ( io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31, io32,io33,io34,io35,io36,io37,io38,io39, io40,io41,io42,io43,io44,io45,io46,io47, io48,io49,io50,io51,io52,io53,io54,io55, io56,io57,io58,io59,io60,io61,io62,io63, io64,io65,io66,io67,io68,io69,io70,io71, io72,io73,io74,io75,io76,io77,io78,io79, io80,io81,io82,io83,io84,io85,io86,io87, io88,io89,io90,io91,io92,io93,io94,io95) to ( 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13) ; } part isplsi1048ea : tqfp128, pqfp128 { newattr "$comment" = "High Density PLD" ; newattr "$type" = "ispLSI 1048EA" ; newattr "$manufacturer" = "Lattice Semiconductor" ; net "vss" : (1,17,33,49,65,81,97,112) ; net "vcc" : (16,48,82,113) ; pin (in2,in4,in6,in7,in8,in9,in10,in11, y0,y1,y2,y3,/reset,goe0,goe1,tdi,tdo,tms,tck,vccio, io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31, io32,io33,io34,io35,io36,io37,io38,io39, io40,io41,io42,io43,io44,io45,io46,io47, io48,io49,io50,io51,io52,io53,io54,io55, io56,io57,io58,io59,io60,io61,io62,io63, io64,io65,io66,io67,io68,io69,io70,io71, io72,io73,io74,io75,io76,io77,io78,io79, io80,io81,io82,io83,io84,io85,io86,io87, io88,io89,io90,io91,io92,io93,io94,io95) ; xlat (in2,in4,in6,in7,in8,in9,in10,in11, y0,y1,y2,y3,/reset,goe0,goe1,tdi,tdo,tms,tck,vccio) to ( 47, 51, 84,110,111,115, 116, 14, 15,83,80,79, 19, 64, 114, 20, 50, 46, 78, 18) ; xlat ( io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31, io32,io33,io34,io35,io36,io37,io38,io39, io40,io41,io42,io43,io44,io45,io46,io47, io48,io49,io50,io51,io52,io53,io54,io55, io56,io57,io58,io59,io60,io61,io62,io63, io64,io65,io66,io67,io68,io69,io70,io71, io72,io73,io74,io75,io76,io77,io78,io79, io80,io81,io82,io83,io84,io85,io86,io87, io88,io89,io90,io91,io92,io93,io94,io95) to ( 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13) ; } part plsi1048e : pqfp128 { newattr "$comment" = "High Density PLD" ; newattr "$type" = "pLSI 1048E" ; newattr "$manufacturer" = "Lattice Semiconductor Corporation" ; net "gnd" : (1,17,33,49,65,81,97,112) ; net "vcc" : (16,48,82,113) ; net "vcc" : (18) ; pin (in0,in1,in2,in3,in4,in5,in6,in7,in8,in9,in10,in11, y0,y1,y2,y3,/reset,goe0,goe1, io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31, io32,io33,io34,io35,io36,io37,io38,io39, io40,io41,io42,io43,io44,io45,io46,io47, io48,io49,io50,io51,io52,io53,io54,io55, io56,io57,io58,io59,io60,io61,io62,io63, io64,io65,io66,io67,io68,io69,io70,io71, io72,io73,io74,io75,io76,io77,io78,io79, io80,io81,io82,io83,io84,io85,io86,io87, io88,io89,io90,io91,io92,io93,io94,io95) ; xlat (in0,in1,in2,in3,in4,in5,in6,in7,in8,in9,in10,in11, y0,y1,y2,y3,goe0,goe1,/reset) to ( 20, 46, 47, 50, 51, 78, 84,110,111,115, 116, 14, 15,83,80,79, 64, 114, 19) ; xlat ( io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31, io32,io33,io34,io35,io36,io37,io38,io39, io40,io41,io42,io43,io44,io45,io46,io47, io48,io49,io50,io51,io52,io53,io54,io55, io56,io57,io58,io59,io60,io61,io62,io63, io64,io65,io66,io67,io68,io69,io70,io71, io72,io73,io74,io75,io76,io77,io78,io79, io80,io81,io82,io83,io84,io85,io86,io87, io88,io89,io90,io91,io92,io93,io94,io95) to ( 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13) ; } /* part isplsi1048c : pqfp128 ; part plsi1048c : pqfp128 ; part isplsi1048 : pqfp128 ; part plsi1048 : pqfp128 ; */ part isplsi2064ve : tqfp44 { newattr "$comment" = "High Density PLD" ; newattr "$type" = "ispLSI 2064VE" ; newattr "$manufacturer" = "Lattice Semiconductor" ; net "vss" : (17,39) ; net "vcc33" : (6,28) ; pin (in3,y0,y1,tdi,tdo,tms,tck,/bscan) ; pin ( io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31) ; xlat (in3,y0,y1,tdi,tdo,tms,tck,/bscan) to ( 40, 5,29, 8, 18, 30, 27, 7) ; xlat ( io0, io1, io2, io3, io4, io5, io6, io7, io8, io9,io10,io11,io12,io13,io14,io15, io16,io17,io18,io19,io20,io21,io22,io23, io24,io25,io26,io27,io28,io29,io30,io31) to ( 9, 10, 11, 12, 13, 14, 15, 16, 19, 20, 21, 22, 23, 24, 25, 26, 31, 32, 33, 34, 35, 36, 37, 38, 41, 42, 43, 44, 1, 2, 3, 4); } part ispgal22v10av : pqfn32 { newattr "$comment" = "High Density PLD" ; newattr "$type" = "ispGAL22V10AVLN" ; newattr "$manufacturer" = "Lattice Semiconductor" ; pin (i0,i1,i2,i3,i4,i5,i6,i7,i8,i9,i10,i11); pin (io0,io1,io2,io3,io4,io5,io6,io7,io8,io9); pin (tdi,tdo,tms,tck,vcc,vcco,gnd,gndo) ; xlat (i0,i1,i2,i3,i4,i5,i6,i7,i8,i9,i10,i11) to (30,31,32, 1, 2, 3, 6, 7, 8, 9, 10, 14); xlat (io0,io1,io2,io3,io4,io5,io6,io7,io8,io9) to ( 26, 25, 24, 23, 22, 19, 18, 17, 16, 15); xlat (tdi,tdo,tms,tck,vcc,vcco,gnd,gndo) to ( 13, 21, 4, 29, 28, 5, 11, 12); net internal /* VCCO */ : (5,27); net internal /* GNDO */ : (12,20); net internal /* GND */ : (11,ep); } part isplsi5512ve : bga272 { newattr "$comment" = "Super Wide High Density PLD" ; newattr "$type" = "ispLSI5512VE-110LB272" ; newattr "$manufacturer" = "Lattice Semiconductor" ; bus (bus1,bus2,bus3) ; pin ( io0, io1, io2, io3, io4, io5, io6, io7, io8, io9, io10, io11, io12, io13, io14, io15, io16, io17, io18, io19, io20, io21, io22, io23, io24, io25, io26, io27, io28, io29, io30, io31, io32, io33, io34, io35, io36, io37, io38, io39, io40, io41, io42, io43, io44, io45, io46, io47, io112,io113,io114,io115,io116,io117,io118,io119, io120,io121,io122,io123,io124,io125,io126,io127, io128,io129,io130,io131,io132,io133,io134,io135, io136,io137,io138,io139,io140,io141,io142,io143, io144,io145,io146,io147,io148,io149,io150,io151, io152,io153,io154,io155,io156,io157,io158,io159) ; pin (clk0,clk1,/reset,goe0,goe1,tdi,tdo,tms,tck,vccio) ; xlat ( bus1.0, bus1.1, bus1.2, bus1.3, bus1.4, bus1.5, bus1.6, bus1.7, bus1.8, bus1.9,bus1.10,bus1.11,bus1.12,bus1.13,bus1.14,bus1.15, bus1.16,bus1.17,bus1.18,bus1.19,bus1.20,bus1.21,bus1.22,bus1.23, bus1.24,bus1.25,bus1.26,bus1.27,bus1.28,bus1.29,bus1.30,bus1.31) to ( u12, y13, w13, v13, y14, w14, y15, v14, w15, y16, u14, v15, w16, y17, v16, y18, u16, v17, w18, y19, v18, v19, u19, u18, v20, u20, t18, t19, r18, p17, r19, r20) ; xlat ( bus2.0, bus2.1, bus2.2, bus2.3, bus2.4, bus2.5, bus2.6, bus2.7, bus2.8, bus2.9,bus2.10,bus2.11,bus2.12,bus2.13,bus2.14,bus2.15, bus2.16,bus2.17,bus2.18,bus2.19,bus2.20,bus2.21,bus2.22,bus2.23, bus2.24,bus2.25,bus2.26,bus2.27,bus2.28,bus2.29,bus2.30,bus2.31) to ( p18, p20, n18, n19, n20, m17, m18, m19, m20, l19, l18, l20, k20, k19, k18, k17, j17, h20, h19, h18, g20, g19, f20, g18, f19, e20, g17, f18, e19, d20, e18, c20) ; xlat ( bus3.0, bus3.1, bus3.2, bus3.3, bus3.4, bus3.5, bus3.6, bus3.7, bus3.8, bus3.9,bus3.10,bus3.11,bus3.12,bus3.13,bus3.14,bus3.15, bus3.16,bus3.17,bus3.18,bus3.19,bus3.20,bus3.21,bus3.22,bus3.23, bus3.24,bus3.25,bus3.26,bus3.27,bus3.28,bus3.29,bus3.30,bus3.31) to ( a3, d5, c4, b2, a2, b1, c2, d2, e4, c1, d1, e3, e1, f3, g4, f2, f1, g3, g2, g1, h3, h2, h1, j4, j3, j2, j1, k2, k3, k1, l1, l2) ; xlat ( io0, io1, io2, io3, io4, io5, io6, io7, io8, io9, io10, io11, io12, io13, io14, io15, io16, io17, io18, io19, io20, io21, io22, io23, io24, io25, io26, io27, io28, io29, io30, io31, io32, io33, io34, io35, io36, io37, io38, io39, io40, io41, io42, io43, io44, io45, io46, io47, io112,io113,io114,io115,io116,io117,io118,io119, io120,io121,io122,io123,io124,io125,io126,io127, io128,io129,io130,io131,io132,io133,io134,io135, io136,io137,io138,io139,io140,io141,io142,io143, io144,io145,io146,io147,io148,io149,io150,io151, io152,io153,io154,io155,io156,io157,io158,io159) to ( m2, m3, m4, n1, n2, n3, p1, p2, r1, p3, r2, t1, p4, t2, t3, v1, v2, v3, y1, w3, v4, u5, y3, y4, v5, w5, y5, v6, u7, w6, y6, v7, w7, y7, v8, w8, y8, u9, v9, w9, y9, w10, v10, y10, y11, w11, w12, v12, e17, d18, a20, a19, b17, c17, d16, a18, c16, b16, a16, c15, d14, b15, a15, c14, b14, a14, c13, b13, a13, d12, c12, b12, a12, b11, c11, a11, a10, b10, a9, b9, c9, d9, a8, b8, c8, a7, b7, a6, c7, b6, a5, d7, c6, b5, a4, b4) ; xlat (clk0,clk1,/reset,goe0,goe1,tdi,tdo,tms,tck,vccio) to ( c10, d10, j18, v11, u11, m1,j20, l3, l4, j19) ; /* Vss Ground Pins : */ net "vss" : (a1,d4,d8,d13,d17,h4,h17,j9,j10,j11,j12) ; net "vss" : (k9,k10,k11,k12,l9,l10,l11,l12,m9,m10,m11,m12) ; net "vss" : (n4,n17,u4,u8,u13,u17); /* Vcc Supply Pins : */ net "vcc33" : (d6,d11,d15,f4,f17,k4,l17,r4,r17,u6,u10,u15) ; } /*______________________________________________________________*/ /* PLDs - Programmable Logic Devices - SuperBIG ispLSI 8000 Family */ /* // ispLSI 8840-110L : Fmax = 110MHz (Tpd = 8.5ns) // ispLSI 8840-90L : Fmax = 90MHz (Tpd = 10ns) // ispLSI 8840-60L : Fmax = 60MHz (Tpd = 15ns) */ /* // Package Assignment: // bga432ball 432-Ball BGA // bga432ball_pth 432-Ball BGA / Plated-Through Holes */ part isplsi8840 : bga432ball,bga432ball_pth { newattr "$comment" = "SuperBIG High Density PLD" ; newattr "$type" = "ispLSI 8840" ; newattr "$manufacturer" = "Lattice Semiconductor Corporation" ; /* Power Supply Locations (432-Ball BGA Package) */ /* Ground (GND) */ net "gnd" : ( a1,a2,a16,a30,a31,b1,b5,b9,b13,b19,b23,b27,b31, e2,e30,j2,j30,n2,n30,t1,t31,w2,w30,ac2,ac30,ag2,ag30, ak1,ak5,ak9,ak13,ak19,ak23,ak27,ak31,al1,al2,al16,al30,al31 ); /* Vcc */ net "vcc" : ( a3,a10,a22,a29,b14,b18,c1,c31,k1,k31,p2,p30,v2,v30, ab1,ab31,aj1,aj31,ak14,ak18,al3,al10,al22,al29 ); /* Power supply for the output drivers (Vcc or 3.3V) */ net "$vccio" : ( d5,d9,d12,d15,d20,d23,d27,h4,h28,m4,m28,t4,t28,y4,y28, ae4,ae28,ah5,ah9,ah12,ah15,ah20,ah23,ah27 ); /* NC pins are not to be connected to any active signals, VCC or GND */ /* "nc" : (a4,b30,d1,d31,ah1,ah31,ak2,ak30,al4,al28); */ /* Signal Locations (432-Ball BGA Package) */ /* Dedicated clock input for GLB registers only */ xlat (clk0,clk1,clk2) to (a18,p29,al19); /* Dedicated clock enable input for GLB registers only */ xlat (clken) to (c18); /* Dedicated clock inputs for I/O registers only */ xlat (gioclk0,gioclk1) to (a19, aj18); /* Global Output Enable inputs */ xlat (goe0,goe1,goe2,goe3) to (d18,t29,ah18,t2); /* Dedicated, active low (0) reset/preset */ xlat (setreset) to (p1); /* Dedicated clock enable input for I/O registers only */ xlat (ioclken) to (al20); /* Dedicated in-system programming input */ xlat (bscan) to (ag28); /* Test Mode Select/ISP State Machine Control input */ xlat (tmsmode) to (e4); /* Dedicated clock inputs for I/O registers only */ xlat (qioclk0,qioclk1,qioclk2,qioclk3) to (d17,r31,al18,t3); /* Test Clock/serial Shift Register Clock input */ xlat (tcksclk) to (ah2); /* Test Data Input/Programming Data Load */ xlat (tdisdi) to (e3); /* Test Data Output/ISP Data Output */ xlat (tdosdo) to (ah3); /* Test Output Enable */ xlat (toe) to (v3); /* I/O Pin Locations (432-Ball BGA Package) */ /* Global Routing Plane I/O busses */ bus (g0,g1,g2,g3,g4,g5); xlat (g0.0, g0.1, g0.2, g0.3, g0.4, g0.5, g0.6, g0.7, g0.8, g0.9, g0.10,g0.11,g0.12,g0.13,g0.14,g0.15, g0.16,g0.17,g0.18,g0.19,g0.20,g0.21,g0.22,g0.23) to (c2,f4,f3,d2,g4,f2,g3,e1, g2,h3,f1,j4,f31,g30,h29,f30, e31,g29,g28,f29,e29,f28,d30,e28); xlat (g1.0, g1.1, g1.2, g1.3, g1.4, g1.5, g1.6, g1.7, g1.8, g1.9, g1.10,g1.11,g1.12,g1.13,g1.14,g1.15, g1.16,g1.17,g1.18,g1.19,g1.20,g1.21,g1.22,g1.23) to (l1,l2,l3,l4,k2,j1,k3,k4, h1,g1,j3,h2,j28,j29,h30,g31, h31,k28,k29,k30,j31,l28,l29,l30); xlat (g2.0, g2.1, g2.2, g2.3, g2.4, g2.5, g2.6, g2.7, g2.8, g2.9, g2.10,g2.11,g2.12,g2.13,g2.14,g2.15, g2.16,g2.17,g2.18,g2.19,g2.20,g2.21,g2.22,g2.23) to (m3,m2,m1,n4,n3,n1,p3,p4, r2,r3,r4,r1,r30,r29,r28,p31, p28,n31,n29,n28,m31,m30,l31,m29); xlat (g3.0, g3.1, g3.2, g3.3, g3.4, g3.5, g3.6, g3.7, g3.8, g3.9, g3.10,g3.11,g3.12,g3.13,g3.14,g3.15, g3.16,g3.17,g3.18,g3.19,g3.20,g3.21,g3.22,g3.23) to (y3,y1,y2,w4,w3,w1,v1,v4, u1,u4,u3,u2,t30,u28,u29,u30, u31,v28,v29,v31,w29,w28,w31,y31); xlat (g4.0, g4.1, g4.2, g4.3, g4.4, g4.5, g4.6, g4.7, g4.8, g4.9, g4.10,g4.11,g4.12,g4.13,g4.14,g4.15, g4.16,g4.17,g4.18,g4.19,g4.20,g4.21,g4.22,g4.23) to (aa2,aa3,aa4,aa1,ab3,ab4,ab2,ac3, ac4,ac1,ad2,ad3,ac28,ac29,ac31,ab28, ab29,ab30,aa29,aa28,aa30,aa31,y30,y29); xlat (g5.0, g5.1, g5.2, g5.3, g5.4, g5.5, g5.6, g5.7, g5.8, g5.9, g5.10,g5.11,g5.12,g5.13,g5.14,g5.15, g5.16,g5.17,g5.18,g5.19,g5.20,g5.21,g5.22,g5.23) to (ag4,ag3,ag1,af1,af4,af3,af2,ae1, ae3,ae2,ad1,ad4,ad31,ad29,ad28,ad30, ae29,ae30,ae31,af31,af28,af29,af30,ag31); /* Big Fast Megablock I/O busses */ bus (b0,b1,b2,b3,b4,b5,b6); xlat (b0.0, b0.1, b0.2, b0.3, b0.4, b0.5, b0.6, b0.7, b0.8, b0.9, b0.10,b0.11,b0.12,b0.13,b0.14,b0.15, b0.16,b0.17,b0.18,b0.19,b0.20,b0.21,b0.22,b0.23) to (d3,d4,b2,c3,c4,c5,d6,c6, b3,d7,b4,b6,aj7,ak6,ah7,aj6, ak4,ah6,aj5,ak3,aj4,aj3,ah4,aj2); xlat (b1.0, b1.1, b1.2, b1.3, b1.4, b1.5, b1.6, b1.7, b1.8, b1.9, b1.10,b1.11,b1.12,b1.13,b1.14,b1.15, b1.16,b1.17,b1.18,b1.19,b1.20,b1.21,b1.22,b1.23) to (d8,c7,a5,c8,b7,a6,c9,a7, d10,b8,c10,a8,ah11,al8,aj10,ak8, ah10,al7,aj9,ak7,aj8,al6,ah8,al5); xlat (b2.0, b2.1, b2.2, b2.3, b2.4, b2.5, b2.6, b2.7, b2.8, b2.9, b2.10,b2.11,b2.12,b2.13,b2.14,b2.15, b2.16,b2.17,b2.18,b2.19,b2.20,b2.21,b2.22,b2.23) to (d11,a9,c11,b10,c12,b11,a11,b12, d13,c13,a12,a13,aj14,al13,aj13,ah13, al12,al11,ak12,aj12,ak11,ak10,aj11,al9); xlat (b3.0, b3.1, b3.2, b3.3, b3.4, b3.5, b3.6, b3.7, b3.8, b3.9, b3.10,b3.11,b3.12,b3.13,b3.14,b3.15, b3.16,b3.17,b3.18,b3.19,b3.20,b3.21,b3.22,b3.23) to (d14,c14,a14,c15,b15,a15,b16,c16, d16,a17,b17,c17,ah17,aj17,ak17,al17, ah16,aj16,ak16,al15,aj15,ak15,al14,ah14); xlat (b4.0, b4.1, b4.2, b4.3, b4.4, b4.5, b4.6, b4.7, b4.8, b4.9, b4.10,b4.11,b4.12,b4.13,b4.14,b4.15, b4.16,b4.17,b4.18,b4.19,b4.20,b4.21,b4.22,b4.23) to (a20,b20,c19,a21,d19,c20,b21,a23, c21,b22,a24,d21,ah21,ak24,al24,aj21, ak22,aj20,al23,ah19,ak21,aj19,ak20,al21); xlat (b5.0, b5.1, b5.2, b5.3, b5.4, b5.5, b5.6, b5.7, b5.8, b5.9, b5.10,b5.11,b5.12,b5.13,b5.14,b5.15, b5.16,b5.17,b5.18,b5.19,b5.20,b5.21,b5.22,b5.23) to (a25,c22,b24,d22,b25,c23,a26,c24, b26,d24,c25,a27,aj26,aj25,ah24,al27, ak26,aj24,aj23,al26,ah22,ak25,al25,aj22); xlat (b6.0, b6.1, b6.2, b6.3, b6.4, b6.5, b6.6, b6.7, b6.8, b6.9, b6.10,b6.11,b6.12,b6.13,b6.14,b6.15, b6.16,b6.17,b6.18,b6.19,b6.20,b6.21,b6.22,b6.23) to (d25,a28,c26,b28,d26,c27,b29,c28, c29,c30,d28,d29,ag29,ah30,ah29,ah28, aj30,aj29,aj28,ah26,aj27,ak29,ak28,ah25); } /*______________________________________________________________*/ /* FPGAs - Field Programmable Gate Array Devices */ part lfecp6e_144 : tqfp144 { newattr "$comment" = "ECP FPGA with DSP functions" ; newattr "$commentge" = "ECP FPGA mit DSP Funktionen" ; newattr "$type" = "LFECP6E-5TN144C (RS:617-2454)" ; newattr "$manufacturer" = "Lattice Semiconductor" ; pin ( pt10a,pt10b,pt12a,pt12b,pt13a,pt13b,pt14a,pt14b, pt15a,pt15b,pt16a,pt16b,pt17a,pt17b,pt18a,pt18b, pt19a,pt19b,pt20a,pt20b,pt21a,pt21b,pt22a,pt22b, pt23a,pt25a,pt25b) ; pin ( pb10a,pb10b,pb11a,pb11b,pb13b,pb14a,pb14b,pb15a, pb15b,pb16a,pb16b,pb17a,pb17b,pb18a,pb18b,pb19a, pb19b,pb20a,pb20b,pb21a,pb21b,pb22a,pb22b,pb23a, pb23b,pb24b,pb25b) ; pin ( pl2a, pl2b, pl7a, pl7b, pl8a, pl8b, pl9a, pl9b, pl20a,pl20b,pl21a,pl21b,pl22a,pl22b,pl23a,pl23b, pl24a,pl24b,pl25a,pl25b,pl27a,pl27b) ; pin ( pr2a, pr2b, pr7a, pr7b, pr8a, pr8b, pr9a, pr9b, pr20a,pr20b,pr21a,pr21b,pr22a,pr22b,pr23a,pr23b, pr24a,pr24b,pr25a,pr25b,pr27a) ; pin ( /init,/program,cclk,cfg0,cfg1,cfg2,done, tck,tdi,tdo,tms,xres,gnd,vcc,vccaux, vccio0,vccio1,vccio2,vccio3,vccio4,vccio5,vccio6,vccio7,vccj) ; xlat ( pt10a,pt10b,pt12a,pt12b,pt13a,pt13b,pt14a,pt14b, pt15a,pt15b,pt16a,pt16b,pt17a,pt17b,pt18a,pt18b, pt19a,pt19b,pt20a,pt20b,pt21a,pt21b,pt22a,pt22b, pt23a,pt25a,pt25b) to ( 142, 141, 140, 139, 138, 137, 135, 134, 133, 132, 131, 130, 129, 127, 124, 123, 122, 121, 120, 119, 118, 116, 115, 114, 113, 112, 111) ; xlat ( pb10a,pb10b,pb11a,pb11b,pb13b,pb14a,pb14b,pb15a, pb15b,pb16a,pb16b,pb17a,pb17b,pb18a,pb18b,pb19a, pb19b,pb20a,pb20b,pb21a,pb21b,pb22a,pb22b,pb23a, pb23b,pb24b,pb25b) to ( 39, 40, 41, 42, 43, 45, 46, 47, 48, 49, 50, 51, 53, 56, 57, 58, 59, 60, 61, 62, 64, 65, 66, 67, 68, 69, 70) ; xlat ( pl2a, pl2b, pl7a, pl7b, pl8a, pl8b, pl9a, pl9b, pl20a,pl20b,pl21a,pl21b,pl22a,pl22b,pl23a,pl23b, pl24a,pl24b,pl25a,pl25b,pl27a,pl27b) to ( 2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 25, 26, 27, 29, 30, 31, 32, 33, 34, 35) ; xlat ( pr2a, pr2b, pr7a, pr7b, pr8a, pr8b, pr9a, pr9b, pr20a,pr20b,pr21a,pr21b,pr22a,pr22b,pr23a,pr23b, pr24a,pr24b,pr25a,pr25b,pr27a) to ( 107, 106, 105, 104, 103, 102, 101, 100, 88, 87, 86, 85, 83, 82, 81, 79, 78, 77, 76, 75, 74) ; xlat ( /init,/program,cclk,cfg0,cfg1,cfg2,done, tck,tdi,tdo,tms,xres,gnd,vcc,vccaux, vccio0,vccio1,vccio2,vccio3,vccio4,vccio5,vccio6,vccio7,vccj) to ( 95, 93, 94, 91, 90, 89, 97, 14, 16, 18, 17, 10, 12, 11, 54, 136, 110, 108, 73, 55, 38, 24, 1, 19) ; net internal /* GND */ : (12,15,28,37,52,63,72,80,96,98,109,117,128,144) ; net internal /* VCC */ : (11,13,92,99) ; net internal /* VCCAUX */ : (54,126) ; net internal /* VCCIO0 */ : (136,143) ; net internal /* VCCIO1 */ : (110,125) ; net internal /* VCCIO3 */ : (73,84) ; net internal /* VCCIO4 */ : (55,71) ; net internal /* VCCIO5 */ : (38,44) ; net internal /* VCCIO6 */ : (24,36) ; } /*______________________________________________________________*/ /* Logical Library definition file end */ end.