loglib

/*___________________________________________________________*/
/*                                                           */
/* LOG Library   : d54ttl.def                                */
/* SCM Library   : d54ttl.ddb                                */
/*                                                           */
/* Author        : M. Baumeister, Bartels System             */
/* Last Revision : 1997/04/21                                */
/*                                                           */
/* Copyright (c) 1991-97 Oliver Bartels F+E, Erding          */
/*___________________________________________________________*/
/*                                                           */
/* This library provides definitions of                      */
/*                                                           */
/* - Bipolar TTL Standard / Series 54TTL                     */
/*                                                           */
/* digital integrated circuits logic family.                 */
/*                                                           */
/* NOTES:                                                    */
/* Temperature   : 54  = Military (-55..125 Degree Celcius)  */
/* Power Supply  : vss = Digital Ground                      */
/*               : vcc = +5V DC                              */
/*___________________________________________________________*/


part 5400 : default dil14 {
	newattr "$comment" = "Quad 2 Input NAND Gate" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, b, y)
	  to ( 1, 2, 3)
	  or ( 4, 5, 6)
	  or ( 9,10, 8)
	  or (12,13,11) ;
	swap ( (( 1, 2), 3),
	       (( 4, 5), 6),
	       (( 9,10), 8),
	       ((12,13),11) ) ;
	}

part 5401 : default dil14 {
	newattr "$comment" = "Quad 2 Input NAND Gate" ;
	newattr "$ttlout" = "OC" ;
	pin (a,b,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, b, y)
	  to ( 2, 3, 1)
	  or ( 5, 6, 4)
	  or ( 8, 9,10)
	  or (11,12,13) ;
	swap ( (( 2, 3), 1),
	       (( 5, 6), 4),
	       (( 8, 9),10),
	       ((11,12),13) ) ;
	}

part 5402 : default dil14 {
	newattr "$comment" = "Quad 2 Input NOR Gate" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, b, y)
	  to ( 2, 3, 1)
	  or ( 5, 6, 4)
	  or ( 8, 9,10)
	  or (11,12,13) ;
	swap ( (( 2, 3), 1),
	       (( 5, 6), 4),
	       (( 8, 9),10),
	       ((11,12),13) ) ;
	}

part 5403 : default dil14 {
	newattr "$comment" = "Quad 2 Input NAND Gate" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, b, y)
	  to ( 1, 2, 3)
	  or ( 4, 5, 6)
	  or ( 9,10, 8)
	  or (12,13,11) ;
	swap ( (( 1, 2), 3),
	       (( 4, 5), 6),
	       (( 9,10), 8),
	       ((12,13),11) ) ;
	}

part 5404 : default dil14 {
	newattr "$comment" = "Hex Inverter" ;
	newattr "$ttlout" = "TP" ;
	pin (a,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, y)
	  to ( 1, 2)
	  or ( 3, 4)
	  or ( 5, 6)
	  or ( 9, 8)
	  or (11,10)
	  or (13,12) ;
	swap ( ( 1, 2), ( 3, 4), ( 5, 6), ( 9, 8), (11,10), (13,12) ) ;
	}

part 5405 : default dil14 {
	newattr "$comment" = "Hex Inverter" ;
	newattr "$ttlout" = "OC" ;
	pin (a,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, y)
	  to ( 1, 2)
	  or ( 3, 4)
	  or ( 5, 6)
	  or ( 9, 8)
	  or (11,10)
	  or (13,12) ;
	swap ( ( 1, 2), ( 3, 4), ( 5, 6), ( 9, 8), (11,10), (13,12) ) ;
	}

part 5406 : default dil14 {
	newattr "$comment" = "Hex Inverter/Buffer, 30V Output" ;
	newattr "$ttlout" = "OC" ;
	pin (a,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, y)
	  to ( 1, 2)
	  or ( 3, 4)
	  or ( 5, 6)
	  or ( 9, 8)
	  or (11,10)
	  or (13,12) ;
	swap ( ( 1, 2), ( 3, 4), ( 5, 6), ( 9, 8), (11,10), (13,12) ) ;
	}

part 5407 : default dil14 {
	newattr "$comment" = "Hex Buffer, 30V Output" ;
	newattr "$ttlout" = "OC" ;
	pin (a,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, y)
	  to ( 1, 2)
	  or ( 3, 4)
	  or ( 5, 6)
	  or ( 9, 8)
	  or (11,10)
	  or (13,12) ;
	swap ( ( 1, 2), ( 3, 4), ( 5, 6), ( 9, 8), (11,10), (13,12) ) ;
	}

part 5408 : default dil14 {
	newattr "$comment" = "Quad 2 Input AND Gate" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, b, y)
	  to ( 1, 2, 3)
	  or ( 4, 5, 6)
	  or ( 9,10, 8)
	  or (12,13,11) ;
	swap ( (( 1, 2), 3),
	       (( 4, 5), 6),
	       (( 9,10), 8),
	       ((12,13),11) ) ;
	}

part 5409 : default dil14 {
	newattr "$comment" = "Quad 2 Input AND Gate" ;
	newattr "$ttlout" = "OC" ;
	pin (a,b,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, b, y)
	  to ( 1, 2, 3)
	  or ( 4, 5, 6)
	  or ( 9,10, 8)
	  or (12,13,11) ;
	swap ( (( 1, 2), 3),
	       (( 4, 5), 6),
	       (( 9,10), 8),
	       ((12,13),11) ) ;
	}

part 5410 : default dil14 {
	newattr "$comment" = "Triple 3 Input NAND Gate" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,c,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (a, b, c, y)
	  to (1, 2,13,12)
	  or (3, 4, 5, 6)
	  or (9,10,11, 8) ;
	swap ( (( 1, 2,13),12), (( 3, 4, 5), 6), (( 9,10,11), 8) ) ;
	}

part 5411 : default dil14 {
	newattr "$comment" = "Triple 3 Input AND Gate" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,c,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (a, b, c, y)
	  to (1, 2,13,12)
	  or (3, 4, 5, 6)
	  or (9,10,11, 8) ;
	swap ( (( 1, 2,13),12), (( 3, 4, 5), 6), (( 9,10,11), 8) ) ;
	}

part 5412 : default dil14 {
	newattr "$comment" = "Triple 3 Input NAND Gate" ;
	newattr "$ttlout" = "OC" ;
	pin (a,b,c,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (a, b, c, y)
	  to (1, 2,13,12)
	  or (3, 4, 5, 6)
	  or (9,10,11, 8) ;
	swap ( (( 1, 2,13),12), (( 3, 4, 5), 6), (( 9,10,11), 8) ) ;
	}

part 5413 : default dil14 {
	newattr "$comment" = "Dual 4 Input NAND Schmitt Trigger" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,c,d,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (a, b, c, d,y)
	  to (1, 2, 4, 5,6)
	  or (9,10,12,13,8) ;
	swap ( (( 1, 2, 4, 5), 6), (( 9,10,12,13), 8) ) ;
	}

part 5414 : default dil14 {
	newattr "$comment" = "Hex Schmitt Trigger" ;
	newattr "$ttlout" = "TP" ;
	pin (a,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, y)
	  to ( 1, 2)
	  or ( 3, 4)
	  or ( 5, 6)
	  or ( 9, 8)
	  or (11,10)
	  or (13,12) ;
	swap ( ( 1, 2), ( 3, 4), ( 5, 6), ( 9, 8), (11,10), (13,12) ) ;
	}

part 5416 : default dil14 {
	newattr "$comment" = "Hex Inverter/Buffer, 15V Output" ;
	newattr "$ttlout" = "OC" ;
	pin (a,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, y)
	  to ( 1, 2)
	  or ( 3, 4)
	  or ( 5, 6)
	  or ( 9, 8)
	  or (11,10)
	  or (13,12) ;
	swap ( ( 1, 2), ( 3, 4), ( 5, 6), ( 9, 8), (11,10), (13,12) ) ;
	}

part 5417 : default dil14 {
	newattr "$comment" = "Hex Buffer, 15V Output" ;
	newattr "$ttlout" = "OC" ;
	pin (a,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, y)
	  to ( 1, 2)
	  or ( 3, 4)
	  or ( 5, 6)
	  or ( 9, 8)
	  or (11,10)
	  or (13,12) ;
	swap ( ( 1, 2), ( 3, 4), ( 5, 6), ( 9, 8), (11,10), (13,12) ) ;
	}

part 5420 : default dil14 {
	newattr "$comment" = "Dual 4 Input NAND Gate" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,c,d,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (a, b, c, d,y)
	  to (1, 2, 4, 5,6)
	  or (9,10,12,13,8) ;
	swap ( (( 1, 2, 4, 5), 6), (( 9,10,12,13), 8) ) ;
	}

part 5421 : default dil14 {
	newattr "$comment" = "Dual 4 Input AND Gate" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,c,d,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (a, b, c, d,y)
	  to (1, 2, 4, 5,6)
	  or (9,10,12,13,8) ;
	swap ( (( 1, 2, 4, 5), 6), (( 9,10,12,13), 8) ) ;
	}

part 5422 : default dil14 {
	newattr "$comment" = "Dual 4 Input NAND Gate" ;
	newattr "$ttlout" = "OC" ;
	pin (a,b,c,d,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (a, b, c, d,y)
	  to (1, 2, 4, 5,6)
	  or (9,10,12,13,8) ;
	swap ( (( 1, 2, 4, 5), 6), (( 9,10,12,13), 8) ) ;
	}

part 5423 : mainpart dil16 {
	newattr "$comment" = "Dual 4 Input Store Expandable I/P NOR" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,c,d,x,/x,g,y) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (a,b,c,d,x,/x,g,y)
	  to (2,3,5,6,1,15,4,7) ;
	swap internal ( (( 2, 3, 5, 6)) ) ;
	}

part 5423x : subpart 5423 {
	pin (a,b,c,d,g,y) ;
	xlat ( a, b, c, d, g,y)
	  to (10,11,13,14,12,9) ;
	swap internal ( ((10,11,13,14)) ) ;
	}

part 5425 : default dil14 {
	newattr "$comment" = "Dual 4 Input NOR Strobe" ;
	newattr "$ttlout" = "TP" ;
	pin (g,a,b,c,d,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( g,a, b, c, d,y)
	  to ( 3,1, 2, 4, 5,6)
	  or (11,9,10,12,13,8) ;
	swap ( [  3, (( 1, 2, 4, 5), 6) ],
	       [ 11, (( 9,10,12,13), 8) ] ) ;
	}

part 5426 : default dil14 {
	newattr "$comment" = "Quad 2 Input NAND, 15V Output" ;
	newattr "$ttlout" = "OC" ;
	pin (a,b,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, b, y)
	  to ( 1, 2, 3)
	  or ( 4, 5, 6)
	  or ( 9,10, 8)
	  or (12,13,11) ;
	swap ( (( 1, 2), 3),
	       (( 4, 5), 6),
	       (( 9,10), 8),
	       ((12,13),11) ) ;
	}

part 5427 : default dil14 {
	newattr "$comment" = "Triple 2 Input NOR Gate" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,c,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (a, b, c, y)
	  to (1, 2,13,12)
	  or (3, 4, 5, 6)
	  or (9,10,11, 8) ;
	swap ( (( 1, 2,13),12), (( 3, 4, 5), 6), (( 9,10,11), 8) ) ;
	}

part 5428 : default dil14 {
	newattr "$comment" = "Quad 2 Input NOR Buffer" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, b, y)
	  to ( 2, 3, 1)
	  or ( 5, 6, 4)
	  or ( 8, 9,10)
	  or (11,12,13) ;
	swap ( (( 2, 3), 1),
	       (( 5, 6), 4),
	       (( 8, 9),10),
	       ((11,12),13) ) ;
	}

part 5430 : default dil14 {
	newattr "$comment" = "8 Input NAND Gate" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,c,d,e,f,g,h,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (a,b,c,d,e,f, g, h,y)
	  to (1,2,3,4,5,6,11,12,8) ;
	swap ( (( 1, 2, 3, 4, 5, 6,11,12), 8) ) ;
	}

part 5432 : default dil14 {
	newattr "$comment" = "Quad 2 Input OR Gate" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, b, y)
	  to ( 1, 2, 3)
	  or ( 4, 5, 6)
	  or ( 9,10, 8)
	  or (12,13,11) ;
	swap ( (( 1, 2), 3),
	       (( 4, 5), 6),
	       (( 9,10), 8),
	       ((12,13),11) ) ;
	}

part 5433 : default dil14 {
	newattr "$comment" = "Quad 2 Input NOR Gate" ;
	newattr "$ttlout" = "OC" ;
	pin (a,b,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, b, y)
	  to ( 2, 3, 1)
	  or ( 5, 6, 4)
	  or ( 8, 9,10)
	  or (11,12,13) ;
	swap ( (( 2, 3), 1),
	       (( 5, 6), 4),
	       (( 8, 9),10),
	       ((11,12),13) ) ;
	}

part 5437 : default dil14 {
	newattr "$comment" = "Quad 2 Input NAND Buffer" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, b, y)
	  to ( 1, 2, 3)
	  or ( 4, 5, 6)
	  or ( 9,10, 8)
	  or (12,13,11) ;
	swap ( (( 1, 2), 3),
	       (( 4, 5), 6),
	       (( 9,10), 8),
	       ((12,13),11) ) ;
	}

part 5438 : default dil14 {
	newattr "$comment" = "Quad 2 Input NAND Buffer" ;
	newattr "$ttlout" = "OC" ;
	pin (a,b,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, b, y)
	  to ( 1, 2, 3)
	  or ( 4, 5, 6)
	  or ( 9,10, 8)
	  or (12,13,11) ;
	swap ( (( 1, 2), 3),
	       (( 4, 5), 6),
	       (( 9,10), 8),
	       ((12,13),11) ) ;
	}

part 5439 : default dil14 {
	newattr "$comment" = "Quad 2 Input NAND Buffer" ;
	newattr "$ttlout" = "OC" ;
	pin (a,b,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, b, y)
	  to ( 2, 3, 1)
	  or ( 5, 6, 4)
	  or ( 8, 9,10)
	  or (11,12,13) ;
	swap ( (( 2, 3), 1),
	       (( 5, 6), 4),
	       (( 8, 9),10),
	       ((11,12),13) ) ;
	}

part 5440 : default dil14 {
	newattr "$comment" = "Dual 4 Input NAND Buffer" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,c,d,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (a, b, c, d,y)
	  to (1, 2, 4, 5,6)
	  or (9,10,12,13,8) ;
	swap ( (( 1, 2, 4, 5), 6), (( 9,10,12,13), 8) ) ;
	}

part 5442 : default dil16 {
	newattr "$comment" = "BCD to Decimal Decoder" ;
	newattr "$ttlout" = "TP" ;
	pin (a0,a1,a2,a3,y0,y1,y2,y3,y4,y5,y6,y7,y8,y9) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (a0,a1,a2,a3,y0,y1,y2,y3,y4,y5,y6,y7,y8,y9)
	  to (15,14,13,12, 1, 2, 3, 4, 5, 6, 7, 9,10,11) ;
	}

part 5443 : default dil16 {
	newattr "$comment" = "Excess-3 to Decimal Decoder" ;
	pin (a0,a1,a2,a3,y0,y1,y2,y3,y4,y5,y6,y7,y8,y9) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (a0,a1,a2,a3,y0,y1,y2,y3,y4,y5,y6,y7,y8,y9)
	  to (15,14,13,12, 1, 2, 3, 4, 5, 6, 7, 9,10,11) ;
	}

part 5444 : default dil16 {
	newattr "$comment" = "Excess-3-Gray to Decimal Decoder" ;
	pin (a0,a1,a2,a3,y0,y1,y2,y3,y4,y5,y6,y7,y8,y9) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (a0,a1,a2,a3,y0,y1,y2,y3,y4,y5,y6,y7,y8,y9)
	  to (15,14,13,12, 1, 2, 3, 4, 5, 6, 7, 9,10,11) ;
	}

part 5445 : default dil16 {
	newattr "$comment" = "BCD to Decimal Decoder, 30V Output" ;
	newattr "$ttlout" = "OC" ;
	pin (a0,a1,a2,a3,y0,y1,y2,y3,y4,y5,y6,y7,y8,y9) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (a0,a1,a2,a3,y0,y1,y2,y3,y4,y5,y6,y7,y8,y9)
	  to (15,14,13,12, 1, 2, 3, 4, 5, 6, 7, 9,10,11) ;
	}

part 5446 : default dil16 {
	newattr "$comment" = "BCD to 7-Segment Decoder, 30V Output" ;
	newattr "$ttlout" = "OC" ;
	pin (bo,bi,lt,a0,a1,a2,a3,a,b,c,d,e,f,g) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (bo,bi,lt,a0,a1,a2,a3, a, b, c, d,e, f, g)
	  to ( 4, 5, 3, 7, 1, 2, 6,13,12,11,10,9,15,14) ;
	}

part 5447 : default dil16 {
	newattr "$comment" = "BCD to 7-Segment Decoder, 15V Output" ;
	newattr "$ttlout" = "OC" ;
	pin (bo,bi,lt,a0,a1,a2,a3,a,b,c,d,e,f,g) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (bo,bi,lt,a0,a1,a2,a3, a, b, c, d,e, f, g)
	  to ( 4, 5, 3, 7, 1, 2, 6,13,12,11,10,9,15,14) ;
	}

part 5448 : default dil16 {
	newattr "$comment" = "BCD to 7-Segment Decoder/Driver" ;
	newattr "$ttlout" = "TP" ;
	pin (bo,bi,lt,a0,a1,a2,a3,a,b,c,d,e,f,g) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (bo,bi,lt,a0,a1,a2,a3, a, b, c, d,e, f, g)
	  to ( 4, 5, 3, 7, 1, 2, 6,13,12,11,10,9,15,14) ;
	}

part 5449 : default dil14 {
	newattr "$comment" = "BCD to 7-Segment Decoder/Driver" ;
	newattr "$ttlout" = "OC" ;
	pin (bi,a0,a1,a2,a3,a,b,c,d,e,f,g) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (bi,a0,a1,a2,a3, a, b,c,d,e, f, g)
	  to ( 3, 5, 1, 2, 4,11,10,9,8,6,13,12) ;
	}

part 5450 : mainpart dil14 {
	newattr "$comment" = "Dual 2 Wide 2 Input AND-OR-Invert" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,c,d,x,/x,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (a, b,c, d, x,/x,y)
	  to (1,13,9,10,11,12,8) ;
	swap ( [  (( 1,13)), (( 9,10)),11,12, 8 ] ) ;
	}

part 5450x : subpart 5450 {
	pin (a,b,c,d,y) ;
	xlat (a,b,c,d,y)
	  to (2,3,4,5,6) ;
	swap ( [  (( 2, 3)), (( 4, 5)), 6 ] ) ;
	}

part 5451 : default dil14 {
	newattr "$comment" = "Dual 2 Wide 2 Input AND-OR-Invert Gate" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,c,d,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (a, b,c, d,y)
	  to (1,13,9,10,8)
	  or (2, 3,4, 5,6) ;
	swap ( [  (( 1,13)), (( 9,10)), 8 ],
	       [  (( 2, 3)), (( 4, 5)), 6 ] ) ;
	}

part 5453 : default dil14 {
	newattr "$comment" = "4 Wide 2 Input AND-OR-Invert Gate" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,c,d,e,f,g,h,x,/x,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (a, b,c,d,e,f,g, h, x,/x,y)
	  to (1,13,2,3,4,5,9,10,11,12,8) ;
	swap internal ( (( 1,13)), (( 2, 3)), (( 4, 5)), (( 9,10)) ) ;
	}

part 5454 : default dil14 {
	newattr "$comment" = "4 Wide 2 Input AND-OR-Invert Gate" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,c,d,e,f,g,h,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (a, b,c,d,e,f,g, h,y)
	  to (1,13,2,3,4,5,9,10,8) ;
	swap internal ( (( 1,13)), (( 2, 3)), (( 4, 5)), (( 9,10)) ) ;
	}

part 5460 : default dil14 {
	newattr "$comment" = "Dual 4 Input Expander" ;
	pin (a,b,c,d,x,/x) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (a,b,c, d, x,/x)
	  to (1,2,3,13,11,12)
	  or (4,5,6, 8,10, 9) ;
	swap ( (( 1, 2, 3,13),11,12), (( 4, 5, 6, 8),10, 9) ) ;
	}

part 5470 : default dil14 {
	newattr "$comment" = "J-K Flip-Flop, Preset + Clear" ;
	newattr "$ttlout" = "TP" ;
	pin (/pre,j1,j2,/j,clk,k1,k2,/k,/clr,q,/q) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (/pre,j1,j2,/j,clk,k1,k2,/k,/clr,q,/q)
	  to (  13, 3, 4, 5, 12,10,11, 9,   2,8, 6) ;
	}

part 5472 : default dil14 {
	newattr "$comment" = "J-K Flip-Flop, Preset + Clear" ;
	newattr "$ttlout" = "TP" ;
	pin (/pre,j1,j2,j3,clk,k1,k2,k3,/clr,q,/q) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (/pre,j1,j2,j3,clk,k1,k2,k3,/clr,q,/q)
	  to (  13, 3, 4, 5, 12, 9,10,11,   2,8, 6) ;
	}

part 5473 : default dil14 {
	newattr "$comment" = "Dual J-K Flip-Flop, Clear" ;
	newattr "$ttlout" = "TP" ;
	pin (j,clk,k,/clr,q,/q) ;
	net "vss" : (11) ;
	net "vcc" : (4) ;
	xlat ( j,clk, k,/clr, q,/q)
	  to (14,  1, 3,   2,12,13)
	  or ( 7,  5,10,   6, 9, 8) ;
	swap ( (14, 1, 3, 2,12,13), ( 7, 5,10, 6, 9, 8) ) ;
	}

part 5474 : default dil14 {
	newattr "$comment" = "Dual D-Flip-Flop, Preset + Clear" ;
	newattr "$ttlout" = "TP" ;
	pin (/pre,clk,d,/clr,q,/q) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (/pre,clk, d,/clr,q,/q)
	  to (   4,  3, 2,   1,5, 6)
	  or (  10, 11,12,  13,9, 8) ;
	swap ( ( 4, 3, 2, 1, 5, 6), (10,11,12,13, 9, 8) ) ;
	}

part 5475 : default dil16 {
	newattr "$comment" = "Quad Bistable Latch" ;
	newattr "$ttlout" = "TP" ;
	pin (d0,d1,c,q0,/q0,q1,/q1) ;
	net "vss" : (12) ;
	net "vcc" : (5) ;
	xlat (d0,d1, c,q0,/q0,q1,/q1)
	  to ( 2, 3,13,16,  1,15, 14)
	  or ( 6, 7, 4,10, 11, 9,  8) ;
	swap ( ( 2, 3,13,16, 1,15,14), ( 6, 7, 4,10,11, 9, 8) ) ;
	}

part 5476 : default dil16 {
	newattr "$comment" = "Dual J-K Flip-Flop, Preset + Clear" ;
	newattr "$ttlout" = "TP" ;
	pin (j,k,clk,/pre,/clr,q,/q) ;
	net "vss" : (13) ;
	net "vcc" : (5) ;
	xlat (j, k,clk,/pre,/clr, q,/q)
	  to (4,16,  1,   2,   3,15,14)
	  or (9,12,  6,   7,   8,11,10) ;
	swap ( ( 4,16, 1, 2, 3,15,14), ( 9,12, 6, 7, 8,11,10) ) ;
	}

part 5477 : default dil14 {
	newattr "$comment" = "4 Bit Bistable Latch" ;
	newattr "$ttlout" = "TP" ;
	pin (c,d0,d1,q0,q1) ;
	net "vss" : (11) ;
	net "vcc" : (4) ;
	xlat ( c,d0,d1,q0,q1)
	  to (12, 1, 2,14,13)
	  or ( 3, 5, 6, 9, 8) ;
	swap ( (12, 1,14, 2,13), ( 3, 5, 9, 6, 8) ) ;
	}

part 5480 : default dil14 {
	newattr "$comment" = "Gated Full Adder" ;
	pin (cn,a1,a2,ax,ac,b1,b2,bx,bc,"/cn+1",s,/s) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (cn,a1,a2,ax,ac,b1,b2,bx,bc,"/cn+1",s,/s)
	  to ( 3, 8, 9,10,11,12,13, 1, 2,      4,5, 6) ;
	swap internal ( ( 8, 9,10,11), (12,13, 1, 2) ) ;
	}

part 5481 : default dil14 {
	newattr "$comment" = "16 Bit Random Access Memory" ;
	pin (s0,s1,w0,w1,x1,y1,x2,y2,x3,y3,x4,y4) ;
	net "vss" : (10) ;
	net "vcc" : (4) ;
	xlat (s0,s1,w0,w1,x1,y1,x2,y2,x3,y3,x4,y4)
	  to (11,12, 9,13, 3, 5, 2, 6, 1, 7,14, 8) ;
	}

part 5482 : default dil14 {
	newattr "$comment" = "2 Bit Binary Full Adder" ;
	pin (ci,a1,a2,b1,b2,c2,s1,s2) ;
	net "vss" : (11) ;
	net "vcc" : (4) ;
	xlat (ci,a1,a2,b1,b2,c2,s1,s2)
	  to ( 5, 2,14, 3,13,10, 1,12) ;
	swap internal ( (( 2, 3)) ) ;
	swap internal ( ((14,13)) ) ;
	}

part 5483 : default dil16 {
	newattr "$comment" = "4 Bit Binary Full Adder, Fast Carry" ;
	newattr "$ttlout" = "TP" ;
	pin (a0,a1,a2,a3,b0,b1,b2,b3,ci,y0,y1,y2,y3,co) ;
	net "vss" : (12) ;
	net "vcc" : (5) ;
	xlat (a0,a1,a2,a3,b0,b1,b2,b3,ci,y0,y1,y2,y3,co)
	  to (10, 8, 3, 1,11, 7, 4,16,13, 9, 6, 2,15,14) ;
	swap internal ( (10, 8, 3, 1), (11, 7, 4,16) ) ;
	}

part 5485 : default dil16 {
	newattr "$comment" = "4 Bit Magnitude Comparator" ;
	newattr "$ttlout" = "TP" ;
	pin (a0,a1,a2,a3,b0,b1,b2,b3,"a<b","a=b","a>b","p<q","p=q","p>q") ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (a0,a1,a2,a3,b0,b1,b2,b3,"a<b","a=b","a>b","p<q","p=q","p>q")
	  to (10,12,13,15, 9,11,14, 1,    2,    3,    4,    7,    6,    5) ;
	swap internal ( (10,12,13,15, 2, 7), ( 9,11,14, 1, 4, 5) ) ;
	}

part 5486 : default dil14 {
	newattr "$comment" = "Quad 2 Input Exclusive OR Gate" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, b, y)
	  to ( 1, 2, 3)
	  or ( 4, 5, 6)
	  or ( 9,10, 8)
	  or (12,13,11) ;
	swap ( (( 1, 2), 3),
	       (( 4, 5), 6),
	       (( 9,10), 8),
	       ((12,13),11) ) ;
	}

part 5489 : default dil16 {
	newattr "$comment" = "64 Bit Random Access Read/Write Memory" ;
	pin (a0,a1,a2,a3,/me,/we,d0,/q0,d1,/q1,d2,/q2,d3,/q3) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (a0,a1,a2,a3,/me,/we,d0,/q0,d1,/q1,d2,/q2,d3,/q3)
	  to ( 1,15,14,13,  2,  3, 4,  5, 6,  7,10,  9,12, 11) ;
	}

part 5490 : default dil14 {
	newattr "$comment" = "Decade Counter" ;
	newattr "$ttlout" = "TP" ;
	pin (r01,r02,r91,r92,a,qa,b,qb,qc,qd) ;
	net "vss" : (10) ;
	net "vcc" : (5) ;
	xlat (r01,r02,r91,r92, a,qa,b,qb,qc,qd)
	  to (  2,  3,  6,  7,14,12,1, 9, 8,11) ;
	swap internal ( (( 2, 3)) ) ;
	swap internal ( (( 6, 7)) ) ;
	}

part 5491 : default dil14 {
	newattr "$comment" = "8 Bit Shift Register" ;
	newattr "$ttlout" = "TP" ;
	pin (ck,a,b,q,/q) ;
	net "vss" : (10) ;
	net "vcc" : (5) ;
	xlat (ck, a, b, q,/q)
	  to ( 9,12,11,13,14) ;
	swap internal ( ((12,11)) ) ;
	}

part 5492 : default dil14 {
	newattr "$comment" = "Divide by 12 Counter" ;
	newattr "$ttlout" = "TP" ;
	pin (r01,r02,a,qa,b,qb,qc,qd) ;
	net "vss" : (10) ;
	net "vcc" : (5) ;
	xlat (r01,r02, a,qa,b,qb,qc,qd)
	  to (  6,  7,14,12,1,11, 9, 8) ;
	swap internal ( (( 6, 7)) ) ;
	}

part 5493 : default dil14 {
	newattr "$comment" = "4 Bit Binary Counter" ;
	newattr "$ttlout" = "TP" ;
	pin (r01,r02,a,qa,b,qb,qc,qd) ;
	net "vss" : (10) ;
	net "vcc" : (5) ;
	xlat (r01,r02, a,qa,b,qb,qc,qd)
	  to (  2,  3,14,12,1, 9, 8,11) ;
	swap internal ( (( 2, 3)) ) ;
	}

part 5494 : default dil16 {
	newattr "$comment" = "4 Bit Shift Register PISO" ;
	pin (pe1,pe2,clr,clk,ser,p1a,p2a,p1b,p2b,p1c,p2c,p1d,p2d,qd) ;
	net "vss" : (12) ;
	net "vcc" : (5) ;
	xlat (pe1,pe2,clr,clk,ser,p1a,p2a,p1b,p2b,p1c,p2c,p1d,p2d,qd)
	  to (  6, 15, 10,  8,  7,  1, 16,  2, 14,  3, 13,  4, 11, 9) ;
	}

part 5495 : default dil14 {
	newattr "$comment" = "4 Bit Shift Register PISO" ;
	newattr "$ttlout" = "TP" ;
	pin (mode,clk1,clk2,ser,a,qa,b,qb,c,qc,d,qd) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (mode,clk1,clk2,ser,a,qa,b,qb,c,qc,d,qd)
	  to (   6,   9,   8,  1,2,13,3,12,4,11,5,10) ;
	}

part 5496 : default dil16 {
	newattr "$comment" = "5 Bit Shift Register" ;
	newattr "$ttlout" = "TP" ;
	pin (/clr,clk,pre,ser,a,qa,b,qb,c,qc,d,qd,e,qe) ;
	net "vss" : (12) ;
	net "vcc" : (5) ;
	xlat (/clr,clk,pre,ser,a,qa,b,qb,c,qc,d,qd,e,qe)
	  to (  16,  1,  8,  9,2,15,3,14,4,13,6,11,7,10) ;
	}

part 5497 : default dil16 {
	newattr "$comment" = "6 Bit Binary Rate Multiplier" ;
	newattr "$ttlout" = "TP" ;
	pin (clk,stb,ei,uc,clr,a,b,c,d,e,f,eo,y,z) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (clk,stb,ei,uc,clr,a,b, c, d,e,f,eo,y,z)
	  to (  9, 10,11,12, 13,4,1,14,15,2,3, 7,6,5) ;
	}

part 54100 : default dil24,dil24b {
	newattr "$comment" = "Dual 8 Bit Bistable Latch" ;
	pin (g,d1,q1,d2,q2,d3,q3,d4,q4) ;
	net "vss" : (7) ;
	net "vcc" : (24) ;
	xlat ( g,d1,q1,d2,q2,d3,q3,d4,q4)
	  to (23, 2, 5, 3, 4,22,19,21,20)
	  or (12,11, 8,10, 9,15,18,16,17) ;
	swap ( [ 23, ( 2, 5), ( 3, 4), (22,19), (21,20) ],
	       [ 12, (11, 8), (10, 9), (15,18), (16,17) ] ) ;
	}

part 54104 : default dil14 {
	newattr "$comment" = "Gated J-K Flip-Flop, Preset + Clear" ;
	pin (/pre,j1,j2,j3,jk,clk,k1,k2,k3,/clr,q,/q) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (/pre,j1,j2,j3,jk,clk,k1,k2,k3,/clr,q,/q)
	  to (   2, 4, 5,12, 1,  9, 3,10,11,  13,6, 8) ;
	}

part 54105 : default dil14 {
	newattr "$comment" = "Gated J-K Flip-Flop, Preset + Clear" ;
	pin (/pre,j1,/j2,j3,jk,clk,k1,/k2,k3,/clr,q,/q) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (/pre,j1,/j2,j3,jk,clk,k1,/k2,k3,/clr,q,/q)
	  to (   2, 4,  5,12, 1,  9, 3, 10,11,  13,6, 8) ;
	}

part 54107 : default dil14 {
	newattr "$comment" = "Dual J-K Flip-Flop, Clear" ;
	newattr "$ttlout" = "TP" ;
	pin (j,clk,k,/clr,q,/q) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (j,clk, k,/clr,q,/q)
	  to (1, 12, 4,  13,3, 2)
	  or (8,  9,11,  10,5, 6) ;
	swap ( ( 1,12, 4,13, 3, 2), ( 8, 9,11,10, 5, 6) ) ;
	}

part 54109 : default dil16 {
	newattr "$comment" = "Dual J-K Flip-Flop, Preset + Clear" ;
	newattr "$ttlout" = "TP" ;
	pin (/pre,j,clk,/k,/clr,q,/q) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/pre, j,clk,/k,/clr, q,/q)
	  to (   5, 2,  4, 3,   1, 6, 7)
	  or (  11,14, 12,13,  15,10, 9) ;
	swap ( ( 5, 2, 4, 3, 1, 6, 7), (11,14,12,13,15,10, 9) ) ;
	}

part 54110 : default dil14 {
	newattr "$comment" = "J-K Flip-Flop, Data Lockout" ;
	pin (/pre,j1,j2,j3,clk,k1,k2,k3,/clr,q,/q) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (/pre,j1,j2,j3,clk,k1,k2,k3,/clr,q,/q)
	  to (  13, 3, 4, 5, 12, 9,10,11,   2,8, 6) ;
	}

part 54111 : default dil16 {
	newattr "$comment" = "Dual J-K Flip-Flop, Data Lockout" ;
	newattr "$ttlout" = "TP" ;
	pin (/pre,j,clk,k,/clr,q,/q) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/pre, j,clk, k,/clr,q,/q)
	  to (   2, 4,  5, 1,   3,7, 6)
	  or (  14,12, 11,15,  13,9,10) ;
	swap ( ( 2, 4, 5, 1, 3, 7, 6), (14,12,11,15,13, 9,10) ) ;
	}

part 54116 : default dil24,dil24b {
	newattr "$comment" = "Dual 4 Bit Latch, Enable + Clear" ;
	newattr "$ttlout" = "TP" ;
	pin (/g1,/g2,clr,d1,q1,d2,q2,d3,q3,d4,q4) ;
	net "vss" : (12) ;
	net "vcc" : (24) ;
	xlat (/g1,/g2,clr,d1,q1,d2,q2,d3,q3,d4,q4)
	  to (  2,  3,  1, 4, 5, 6, 7, 8, 9,10,11)
	  or ( 14, 15, 13,16,17,18,19,20,21,22,23) ;
	swap ( [  2, 3, 1, ( 4, 5), ( 6, 7), ( 8, 9), (10,11) ],
	       [ 14,15,13, (16,17), (18,19), (20,21), (22,23) ] ) ;
	}

part 54118 : default dil16 {
	newattr "$comment" = "Hex Set-Reset Latch" ;
	pin (res,s1,q1,s2,q2,s3,q3,s4,q4,s5,q5,s6,q6) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (res,s1,q1,s2,q2,s3,q3,s4,q4,s5,q5,s6,q6)
	  to (  9, 1, 2, 4, 3, 6, 5,10,11,12,13,15,14) ;
	swap ( [  9,
	       ( 1, 2),
	       ( 4, 3),
	       ( 6, 5),
	       (10,11),
	       (12,13),
	       (15,14) ] ) ;
	}

part 54121 : default dil14 {
	newattr "$comment" = "Monostable Multivibrator" ;
	newattr "$ttlout" = "TP" ;
	pin (a1,a2,b,ri,cx,rxcx,q,/q) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (a1,a2,b,ri,cx,rxcx,q,/q)
	  to ( 3, 4,5, 9,10,  11,6, 1) ;
	swap internal ( (( 3, 4)) ) ;
	}

part 54122 : default dil14 {
	newattr "$comment" = "Monostable Multivibrator, Retriggerable" ;
	newattr "$ttlout" = "TP" ;
	pin (a1,a2,b1,b2,/clr,ri,cx,rxcx,q,/q) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (a1,a2,b1,b2,/clr,ri,cx,rxcx,q,/q)
	  to ( 1, 2, 3, 4,   5, 9,11,  13,8, 6) ;
	swap internal ( (( 1, 2)) ) ;
	swap internal ( (( 3, 4)) ) ;
	}

part 54123 : default dil16 {
	newattr "$comment" = "Dual Monostable Multivibrator, Retrigg." ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,/clr,cx,rx,q,/q) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (a, b,/clr,cx,rx, q,/q)
	  to (1, 2,   3,14,15,13, 4)
	  or (9,10,  11, 6, 7, 5,12) ;
	swap ( ( 1, 2, 3,14,15,13, 4), ( 9,10,11, 6, 7, 5,12) ) ;
	}

part 54125 : default dil14 {
	newattr "$comment" = "Quad Bus Buffer Gate" ;
	newattr "$ttlout" = "TS" ;
	pin (c,a,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( c, a, y)
	  to ( 1, 2, 3)
	  or ( 4, 5, 6)
	  or (10, 9, 8)
	  or (13,12,11) ;
	swap ( ( 1, 2, 3), ( 4, 5, 6), (10, 9, 8), (13,12,11) ) ;
	}

part 54126 : default dil14 {
	newattr "$comment" = "Quad Bus Buffer Gate" ;
	newattr "$ttlout" = "TS" ;
	pin (c,a,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( c, a, y)
	  to ( 1, 2, 3)
	  or ( 4, 5, 6)
	  or (10, 9, 8)
	  or (13,12,11) ;
	swap ( ( 1, 2, 3), ( 4, 5, 6), (10, 9, 8), (13,12,11) ) ;
	}

part 54128 : default dil14 {
	newattr "$comment" = "Quad 2 Input NOR Line Driver" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, b, y)
	  to ( 2, 3, 1)
	  or ( 5, 6, 4)
	  or ( 8, 9,10)
	  or (11,12,13) ;
	swap ( (( 2, 3), 1),
	       (( 5, 6), 4),
	       (( 8, 9),10),
	       ((11,12),13) ) ;
	}

part 54132 : default dil14 {
	newattr "$comment" = "Quad 2 Input Schmitt Trigger" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, b, y)
	  to ( 1, 2, 3)
	  or ( 4, 5, 6)
	  or ( 9,10, 8)
	  or (12,13,11) ;
	swap ( (( 1, 2), 3),
	       (( 4, 5), 6),
	       (( 9,10), 8),
	       ((12,13),11) ) ;
	}

part 54136 : default dil14 {
	newattr "$comment" = "Quad 2 Input Exclusive OR Gate" ;
	newattr "$ttlout" = "OC" ;
	pin (a,b,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( a, b, y)
	  to ( 1, 2, 3)
	  or ( 4, 5, 6)
	  or ( 9,10, 8)
	  or (12,13,11) ;
	swap ( (( 1, 2), 3),
	       (( 4, 5), 6),
	       (( 9,10), 8),
	       ((12,13),11) ) ;
	}

part 54141 : default dil16 {
	newattr "$comment" = "BCD Decimal Decoder/Driver" ;
	pin (a0,a1,a2,a3,y0,y1,y2,y3,y4,y5,y6,y7,y8,y9) ;
	net "vss" : (12) ;
	net "vcc" : (5) ;
	xlat (a0,a1,a2,a3,y0,y1,y2,y3,y4,y5,y6,y7,y8,y9)
	  to ( 3, 6, 7, 4,16,15, 8, 9,13,14,11,10, 1, 2) ;
	}

part 54145 : default dil16 {
	newattr "$comment" = "BCD to Decimal Decoder/Driver" ;
	newattr "$ttlout" = "OC" ;
	pin (a0,a1,a2,a3,y0,y1,y2,y3,y4,y5,y6,y7,y8,y9) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (a0,a1,a2,a3,y0,y1,y2,y3,y4,y5,y6,y7,y8,y9)
	  to (15,14,13,12, 1, 2, 3, 4, 5, 6, 7, 9,10,11) ;
	}

part 54147 : default dil16 {
	newattr "$comment" = "10-Decimal to 4-BCD Priority Encoder" ;
	newattr "$ttlout" = "TP" ;
	pin (i1,i2,i3,i4,i5,i6,i7,i8,i9,a,b,c,d) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (i1,i2,i3,i4,i5,i6,i7,i8,i9,a,b,c, d)
	  to (11,12,13, 1, 2, 3, 4, 5,10,9,7,6,14) ;
	}

part 54148 : default dil16 {
	newattr "$comment" = "8 to 3 Octal Priority Encoder" ;
	newattr "$ttlout" = "TP" ;
	pin (i1,i2,i3,i4,i5,i6,i7,i8,ei,eo,gs,a0,a1,a2) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (i1,i2,i3,i4,i5,i6,i7,i8,ei,eo,gs,a0,a1,a2)
	  to (10,11,12,13, 1, 2, 3, 4, 5,15,14, 9, 7, 6) ;
	}

part 54150 : default dil24,dil24b {
	newattr "$comment" = "16 Bit Data Selector/Multiplexer" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,c,d,/g,e0,e1,e2,e3,e4,e5,e6,e7,e8,e9,e10,e11,e12,e13,e14,
	     e15,w) ;
	net "vss" : (12) ;
	net "vcc" : (24) ;
	xlat ( a, b, c, d,/g,e0,e1,e2,e3,e4,e5,e6,e7,e8,e9,e10,e11,e12,e13,
	      e14,e15, w)
	  to (15,14,13,11, 9, 8, 7, 6, 5, 4, 3, 2, 1,23,22, 21, 20, 19, 18,
	       17, 16,10) ;
	}

part 54151 : default dil16 {
	newattr "$comment" = "8 to 1 Data Selector/Multiplexer" ;
	newattr "$ttlout" = "TP" ;
	pin (/g,a,b,c,d0,d1,d2,d3,d4,d5,d6,d7,y,w) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/g, a, b,c,d0,d1,d2,d3,d4,d5,d6,d7,y,w)
	  to ( 7,11,10,9, 4, 3, 2, 1,15,14,13,12,5,6) ;
	}

part 54152 : default dil14 {
	newattr "$comment" = "8 to 1 Data Selector/Multiplexer" ;
	pin (d0,d1,d2,d3,d4,d5,d6,d7,a,b,c,w) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (d0,d1,d2,d3,d4,d5,d6,d7, a,b,c,w)
	  to ( 5, 4, 3, 2, 1,13,12,11,10,9,8,6) ;
	}

part 54153 : default dil16 {
	newattr "$comment" = "Dual 4 to 1 Data Selector/Multiplexer" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,/1g,1c0,1c1,1c2,1c3,1y,/2g,2c0,2c1,2c2,2c3,2y) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat ( a,b,/1g,1c0,1c1,1c2,1c3,1y,/2g,2c0,2c1,2c2,2c3,2y)
	  to (14,2,  1,  6,  5,  4,  3, 7, 15, 10, 11, 12, 13, 9) ;
	swap ( [ 14, 2, ( 1, 6, 5, 4, 3, 7), (15,10,11,12,13, 9) ] ) ;
	}

part 54154 : default dil24,dil24b {
	newattr "$comment" = "4 of 16 Line Decoder/Demultiplexer" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,c,d,/g1,/g2,y0,y1,y2,y3,y4,y5,y6,y7,y8,y9,y10,y11,y12,y13,
	     y14,y15) ;
	net "vss" : (12) ;
	net "vcc" : (24) ;
	xlat ( a, b, c, d,/g1,/g2,y0,y1,y2,y3,y4,y5,y6,y7,y8,y9,y10,y11,y12,
	      y13,y14,y15)
	  to (23,22,21,20, 18, 19, 1, 2, 3, 4, 5, 6, 7, 8, 9,10, 11, 13, 14,
	       15, 16, 17) ;
	swap internal ( ((18,19)) ) ;
	}

part 54155 : default dil16 {
	newattr "$comment" = "Dual 1 of 4 Decoder/Demultiplexer" ;
	newattr "$ttlout" = "TP" ;
	pin (a0,a1,/g1,c1,1y0,1y1,1y2,1y3,/g2,/c2,2y0,2y1,2y2,2y3) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (a0,a1,/g1,c1,1y0,1y1,1y2,1y3,/g2,/c2,2y0,2y1,2y2,2y3)
	  to (13, 3,  2, 1,  7,  6,  5,  4, 14, 15,  9, 10, 11, 12) ;
	}

part 54156 : default dil16 {
	newattr "$comment" = "Dual 1 of 4 Decoder/Demultiplexer" ;
	newattr "$ttlout" = "OC" ;
	pin (a0,a1,/g1,c1,1y0,1y1,1y2,1y3,/g2,/c2,2y0,2y1,2y2,2y3) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (a0,a1,/g1,c1,1y0,1y1,1y2,1y3,/g2,/c2,2y0,2y1,2y2,2y3)
	  to (13, 3,  2, 1,  7,  6,  5,  4, 14, 15,  9, 10, 11, 12) ;
	}

part 54157 : default dil16 {
	newattr "$comment" = "Quad 2 to 1 Multiplexer noninverting" ;
	newattr "$ttlout" = "TP" ;
	pin (/g,sel,1a,1b,y1,2a,2b,y2,3a,3b,y3,4a,4b,y4) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/g,sel,1a,1b,y1,2a,2b,y2,3a,3b,y3,4a,4b,y4)
	  to (15,  1, 2, 3, 4, 5, 6, 7,11,10, 9,14,13,12) ;
	swap ( [ 15, 1,
	       ( 2, 3, 4),
	       ( 5, 6, 7),
	       (11,10, 9),
	       (14,13,12) ] ) ;
	}

part 54158 : default dil16 {
	newattr "$comment" = "Quad 2 to 1 Multiplexer inverting" ;
	newattr "$ttlout" = "TP" ;
	pin (/g,sel,1a,1b,y1,2a,2b,y2,3a,3b,y3,4a,4b,y4) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/g,sel,1a,1b,y1,2a,2b,y2,3a,3b,y3,4a,4b,y4)
	  to (15,  1, 2, 3, 4, 5, 6, 7,11,10, 9,14,13,12) ;
	swap ( [ 15, 1,
	       ( 2, 3, 4),
	       ( 5, 6, 7),
	       (11,10, 9),
	       (14,13,12) ] ) ;
	}

part 54159 : default dil24,dil24b {
	newattr "$comment" = "4 of 16 Line Decoder/Demultiplexer" ;
	newattr "$ttlout" = "OC" ;
	pin (a,b,c,d,/g1,/g2,o0,o1,o2,o3,o4,o5,o6,o7,o8,o9,q10,q11,q12,q13,
	     q14,q15) ;
	net "vss" : (12) ;
	net "vcc" : (24) ;
	xlat ( a, b, c, d,/g1,/g2,o0,o1,o2,o3,o4,o5,o6,o7,o8,o9,q10,q11,q12,
	      q13,q14,q15)
	  to (23,22,21,20, 18, 19, 1, 2, 3, 4, 5, 6, 7, 8, 9,10, 11, 13, 14,
	       15, 16, 17) ;
	swap internal ( ((18,19)) ) ;
	}

part 54160 : default dil16 {
	newattr "$comment" = "BCD Decade Counter, Direct Clear" ;
	newattr "$ttlout" = "TP" ;
	pin (/clr,/load,ent,enp,clk,rco,a,qa,b,qb,c,qc,d,qd) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/clr,/load,ent,enp,clk,rco,a,qa,b,qb,c,qc,d,qd)
	  to (   1,    9, 10,  7,  2, 15,3,14,4,13,5,12,6,11) ;
	}

part 54161 : default dil16 {
	newattr "$comment" = "4 Bit Binary Counter, Direct Clear" ;
	newattr "$ttlout" = "TP" ;
	pin (/clr,/load,ent,enp,clk,rco,a,qa,b,qb,c,qc,d,qd) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/clr,/load,ent,enp,clk,rco,a,qa,b,qb,c,qc,d,qd)
	  to (   1,    9, 10,  7,  2, 15,3,14,4,13,5,12,6,11) ;
	}

part 54162 : default dil16 {
	newattr "$comment" = "BCD Decade Counter, Sync. Clear" ;
	newattr "$ttlout" = "TP" ;
	pin (/clr,/load,ent,enp,clk,rco,a,qa,b,qb,c,qc,d,qd) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/clr,/load,ent,enp,clk,rco,a,qa,b,qb,c,qc,d,qd)
	  to (   1,    9, 10,  7,  2, 15,3,14,4,13,5,12,6,11) ;
	}

part 54163 : default dil16 {
	newattr "$comment" = "4 Bit Binary Counter, Sync. Clear" ;
	newattr "$ttlout" = "TP" ;
	pin (/clr,/load,ent,enp,clk,rco,a,qa,b,qb,c,qc,d,qd) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/clr,/load,ent,enp,clk,rco,a,qa,b,qb,c,qc,d,qd)
	  to (   1,    9, 10,  7,  2, 15,3,14,4,13,5,12,6,11) ;
	}

part 54164 : default dil14 {
	newattr "$comment" = "8 Bit Shift Register SIPO" ;
	newattr "$ttlout" = "TP" ;
	pin (/clr,clk,a,b,qa,qb,qc,qd,qe,qf,qg,qh) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (/clr,clk,a,b,qa,qb,qc,qd,qe,qf,qg,qh)
	  to (   9,  8,1,2, 3, 4, 5, 6,10,11,12,13) ;
	swap internal ( (( 1, 2)) ) ;
	}

part 54165 : default dil16 {
	newattr "$comment" = "8 Bit PISO Shift Register" ;
	newattr "$ttlout" = "TP" ;
	pin (shld,clkinh,clk,ser,a,b,c,d,e,f,g,h,qh,/qh) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (shld,clkinh,clk,ser, a, b, c, d,e,f,g,h,qh,/qh)
	  to (   1,    15,  2, 10,11,12,13,14,3,4,5,6, 9,  7) ;
	}

part 54166 : default dil16 {
	newattr "$comment" = "8 Bit PISO Shift Register" ;
	newattr "$ttlout" = "TP" ;
	pin (/clr,shld,clkinh,clk,ser,a,b,c,d,e,f,g,h,qh) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/clr,shld,clkinh,clk,ser,a,b,c,d, e, f, g, h,qh)
	  to (   9,  15,     6,  7,  1,2,3,4,5,10,11,12,14,13) ;
	}

part 54167 : default dil16 {
	newattr "$comment" = "4 Bit Sync. Decade Rate Multiplier" ;
	newattr "$ttlout" = "TP" ;
	pin (clk,stb,ei,uc,set9,clr,a,b,c,d,eo,y,z) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (clk,stb,ei,uc,set9,clr, a, b,c,d,eo,y,z)
	  to (  9, 10,11,12,   4, 13,14,15,2,3, 7,6,5) ;
	}

part 54170 : default dil16 {
	newattr "$comment" = "4 by 4 Register File" ;
	newattr "$ttlout" = "TP" ;
	pin (ra,rb,wa,wb,/gw,/gr,d1,q1,d2,q2,d3,q3,d4,q4) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (ra,rb,wa,wb,/gw,/gr,d1,q1,d2,q2,d3,q3,d4,q4)
	  to ( 5, 4,14,13, 12, 11,15,10, 1, 9, 2, 7, 3, 6) ;
	}

part 54173 : default dil16 {
	newattr "$comment" = "Quad D Register" ;
	newattr "$ttlout" = "TS" ;
	pin (clr,m,n,/g1,/g2,clk,1d,1q,2d,2q,3d,3q,4d,4q) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (clr,m,n,/g1,/g2,clk,1d,1q,2d,2q,3d,3q,4d,4q)
	  to ( 15,1,2,  9, 10,  7,14, 3,13, 4,12, 5,11, 6) ;
	swap internal ( (( 1, 2)) ) ;
	swap internal ( (( 9,10)) ) ;
	}

part 54174 : default dil16 {
	newattr "$comment" = "Hex D-Flip-Flop" ;
	newattr "$ttlout" = "TP" ;
	pin (/clr,clk,d1,q1,d2,q2,d3,d4,q3,q4,d5,q5,d6,q6) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/clr,clk,d1,q1,d2,q2,d3,q3,d4,q4,d5,q5,d6,q6)
	  to (   1,  9, 3, 2, 4, 5, 6, 7,11,10,13,12,14,15) ;
	swap ( [  1, 9,
	       ( 3, 2),
	       ( 4, 5),
	       ( 6, 7),
	       (11,10),
	       (13,12),
	       (14,15) ] ) ;
	}

part 54175 : default dil16 {
	newattr "$comment" = "Quad D-Flip-Flop" ;
	newattr "$ttlout" = "TP" ;
	pin (/clr,clk,d1,q1,/q1,d2,q2,/q2,d3,q3,/q3,d4,q4,/q4) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/clr,clk,d1,q1,/q1,d2,q2,/q2,d3,q3,/q3,d4,q4,/q4)
	  to (   1,  9, 4, 2,  3, 5, 7,  6,12,10, 11,13,15, 14) ;
	swap ( [  1, 9,
	       ( 4, 2, 3),
	       ( 5, 7, 6),
	       (12,10,11),
	       (13,15,14) ] ) ;
	}

part 54176 : default dil14 {
	newattr "$comment" = "Presetable Decade (Bi-Quinary) Counter" ;
	newattr "$ttlout" = "TP" ;
	pin (/ld,/clr,clk1,a,qa,clk2,b,c,d,qb,qc,qd) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (/ld,/clr,clk1,a,qa,clk2, b,c, d,qb,qc,qd)
	  to (  1,  13,   8,4, 5,   6,10,3,11, 9, 2,12) ;
	}

part 54177 : default dil14 {
	newattr "$comment" = "Presetable Binary Counter" ;
	newattr "$ttlout" = "TP" ;
	pin (/ld,/clr,clk1,a,qa,clk2,b,c,d,qb,qc,qd) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (/ld,/clr,clk1,a,qa,clk2, b,c, d,qb,qc,qd)
	  to (  1,  13,   8,4, 5,   6,10,3,11, 9, 2,12) ;
	}

part 54178 : default dil14 {
	newattr "$comment" = "4 Bit Universal Shift Register PIPO" ;
	newattr "$ttlout" = "TP" ;
	pin (ld,sh,clk,ser,a,qa,b,qb,c,qc,d,qd) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (ld,sh,clk,ser,a,qa,b,qb, c,qc, d,qd)
	  to ( 9,11,  5,  3,2, 4,1, 6,13, 8,12,10) ;
	}

part 54179 : default dil16 {
	newattr "$comment" = "4 Bit Universal Shift Register PIPO" ;
	pin (/clr,ld,sh,clk,ser,a,qa,b,qb,c,qc,d,qd,/qd) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/clr,ld,sh,clk,ser,a,qa,b,qb, c,qc, d,qd,/qd)
	  to (   1,10,13,  6,  4,3, 5,2, 7,15, 9,14,11, 12) ;
	}

part 54180 : default dil14 {
	newattr "$comment" = "9 Bit Odd/Even Parity Generator/Checker" ;
	newattr "$ttlout" = "TP" ;
	pin (ein,oin,a,b,c,d,e,f,g,h,eout,oout) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (ein,oin,a,b, c, d, e, f,g,h,eout,oout)
	  to (  3,  4,8,9,10,11,12,13,1,2,   5,   6) ;
	}

part 54181 : default dil24,dil24b {
	newattr "$comment" = "4 Bit ALU/Function Generator" ;
	newattr "$ttlout" = "TP" ;
	pin (s0,s1,s2,s3,m,cn,/p,/g,"a=b","cn+4",/a0,/b0,/f0,/a1,/b1,/f1,
	     /a2,/b2,/f2,/a3,/b3,/f3) ;
	net "vss" : (12) ;
	net "vcc" : (24) ;
	xlat (s0,s1,s2,s3,m,cn,/p,/g,"a=b","cn+4",/a0,/b0,/f0,/a1,/b1,/f1,
	      /a2,/b2,/f2,/a3,/b3,/f3)
	  to ( 6, 5, 4, 3,8, 7,15,17,   14,    16,  2,  1,  9, 23, 22, 10,
	       21, 20, 11, 19, 18, 13) ;
	}

part 54182 : default dil16 {
	newattr "$comment" = "16 Bit Look-Ahead Carry Generator" ;
	newattr "$ttlout" = "TP" ;
	pin (/cn,/p0,/g0,/p1,/g1,/p2,/g2,/p3,/g3,"cn+x","cn+y","cn+z",/p,
	     /g) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/cn,/p0,/g0,/p1,/g1,/p2,/g2,/p3,/g3,"cn+x","cn+y","cn+z",/p,
	      /g)
	  to ( 13,  4,  3,  2,  1, 15, 14,  6,  5,    12,    11,     9, 7,
	      10) ;
	}

part 54184 : default dil16 {
	newattr "$comment" = "Cascadable BCD to Binary Code Converter" ;
	pin (/g,a,b,c,d,e,y1,y2,y3,y4,y5,y6,y7,y8) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/g, a, b, c, d, e,y1,y2,y3,y4,y5,y6,y7,y8)
	  to (15,10,11,12,13,14, 1, 2, 3, 4, 5, 6, 7, 9) ;
	}

part 54185 : default dil16 {
	newattr "$comment" = "Cascadable Binary to BCD Code Converter" ;
	pin (g,a,b,c,d,e,y1,y2,y3,y4,y5,y6,y7,y8) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat ( g, a, b, c, d, e,y1,y2,y3,y4,y5,y6,y7,y8)
	  to (15,10,11,12,13,14, 1, 2, 3, 4, 5, 6, 7, 9) ;
	swap ( ((15,10,11,12,13,14), 1, 2, 3, 4, 5, 6, 7, 9) ) ;
	}

part 54190 : default dil16 {
	newattr "$comment" = "Synchronous Up/Down BCD Counter" ;
	newattr "$ttlout" = "OC" ;
	pin (/cten,du,clk,/load,maxmin,/rco,a,qa,b,qb,c,qc,d,qd) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/cten,du,clk,/load,maxmin,/rco, a,qa,b,qb, c,qc,d,qd)
	  to (    4, 5, 14,   11,    12,  13,15, 3,1, 2,10, 6,9, 7) ;
	}

part 54191 : default dil16 {
	newattr "$comment" = "Synchronous Up/Down Binary Counter" ;
	newattr "$ttlout" = "TP" ;
	pin (/cten,du,clk,/load,maxmin,/rco,a,qa,b,qb,c,qc,d,qd) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/cten,du,clk,/load,maxmin,/rco, a,qa,b,qb, c,qc,d,qd)
	  to (    4, 5, 14,   11,    12,  13,15, 3,1, 2,10, 6,9, 7) ;
	}

part 54192 : default dil16 {
	newattr "$comment" = "Sync. Up/Down Dual Clock BCD Counter" ;
	newattr "$ttlout" = "TP" ;
	pin (clr,up,down,/load,/co,/bo,a,qa,b,qb,c,qc,d,qd) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (clr,up,down,/load,/co,/bo, a,qa,b,qb, c,qc,d,qd)
	  to ( 14, 5,   4,   11, 12, 13,15, 3,1, 2,10, 6,9, 7) ;
	}

part 54193 : default dil16 {
	newattr "$comment" = "Sync. Up/Down Dual Clock Binary Counter" ;
	newattr "$ttlout" = "TP" ;
	pin (clr,up,down,/load,/co,/bo,a,qa,b,qb,c,qc,d,qd) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (clr,up,down,/load,/co,/bo, a,qa,b,qb, c,qc,d,qd)
	  to ( 14, 5,   4,   11, 12, 13,15, 3,1, 2,10, 6,9, 7) ;
	}

part 54194 : default dil16 {
	newattr "$comment" = "4 Bit Universal Shift Register PIPO" ;
	newattr "$ttlout" = "TP" ;
	pin (/clr,s0,s1,clk,srser,a,qa,b,qb,c,qc,d,slser,qd) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/clr,s0,s1,clk,srser,a,qa,b,qb,c,qc,d,slser,qd)
	  to (   1, 9,10, 11,    2,3,15,4,14,5,13,6,    7,12) ;
	}

part 54195 : default dil16 {
	newattr "$comment" = "4 Bit Shift Register PIPO" ;
	newattr "$ttlout" = "TP" ;
	pin (/clr,shld,clk,j,/k,a,qa,b,qb,c,qc,d,qd,/qd) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/clr,shld,clk,j,/k,a,qa,b,qb,c,qc,d,qd,/qd)
	  to (   1,   9, 10,2, 3,4,15,5,14,6,13,7,12, 11) ;
	}

part 54196 : default dil14 {
	newattr "$comment" = "Presetable Decade (Bi-Quinary) Counter" ;
	newattr "$ttlout" = "TP" ;
	pin (/ld,/clr,clk1,a,qa,clk2,b,c,d,qb,qc,qd) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (/ld,/clr,clk1,a,qa,clk2, b,c, d,qb,qc,qd)
	  to (  1,  13,   8,4, 5,   6,10,3,11, 9, 2,12) ;
	}

part 54197 : default dil14 {
	newattr "$comment" = "Presetable 4 Bit Binary Counter" ;
	newattr "$ttlout" = "TP" ;
	pin (/ld,/clr,clk1,a,qa,clk2,b,c,d,qb,qc,qd) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (/ld,/clr,clk1,a,qa,clk2, b,c, d,qb,qc,qd)
	  to (  1,  13,   8,4, 5,   6,10,3,11, 9, 2,12) ;
	}

part 54198 : default dil24,dil24b {
	newattr "$comment" = "8 Bit Universal Shift Register PIPO" ;
	newattr "$ttlout" = "TP" ;
	pin (/clr,s0,s1,clk,srser,a,qa,b,qb,c,qc,d,qd,e,qe,f,qf,g,qg,h,slser,
	     qh) ;
	net "vss" : (12) ;
	net "vcc" : (24) ;
	xlat (/clr,s0,s1,clk,srser,a,qa,b,qb,c,qc,d,qd, e,qe, f,qf, g,qg,
	       h,slser,qh)
	  to (  13, 1,23, 11,    2,3, 4,5, 6,7, 8,9,10,15,14,17,16,19,18,
	      21,   22,20) ;
	}

part 54221 : default dil16 {
	newattr "$comment" = "Dual Monostable Multivibr., Schm.Trigger" ;
	newattr "$ttlout" = "TS" ;
	pin (a,b,/clr,cx,"rx/cx",q,/q) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (a, b,/clr,cx,"rx/cx", q,/q)
	  to (1, 2,   3,14,     15,13, 4)
	  or (9,10,  11, 6,      7, 5,12) ;
	swap ( ( 1, 2, 3,14,15,13, 4), ( 9,10,11, 6, 7, 5,12) ) ;
	}

part 54246 : default dil16 {
	newattr "$comment" = "BCD to 7 Segment Decoder/Driver" ;
	newattr "$ttlout" = "OC" ;
	pin (bo,bi,lt,a0,a1,a2,a3,a,b,c,d,e,f,g) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (bo,bi,lt,a0,a1,a2,a3, a, b, c, d,e, f, g)
	  to ( 4, 5, 3, 7, 1, 2, 6,13,12,11,10,9,15,14) ;
	}

part 54247 : default dil16 {
	newattr "$comment" = "BCD to 7 Segment Decoder/Driver" ;
	newattr "$ttlout" = "OC" ;
	pin (bo,bi,lt,a0,a1,a2,a3,a,b,c,d,e,f,g) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (bo,bi,lt,a0,a1,a2,a3, a, b, c, d,e, f, g)
	  to ( 4, 5, 3, 7, 1, 2, 6,13,12,11,10,9,15,14) ;
	}

part 54248 : default dil16 {
	newattr "$comment" = "BCD to 7 Segment Decoder/Driver" ;
	newattr "$ttlout" = "TP" ;
	pin (bo,bi,lt,a0,a1,a2,a3,a,b,c,d,e,f,g) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (bo,bi,lt,a0,a1,a2,a3, a, b, c, d,e, f, g)
	  to ( 4, 5, 3, 7, 1, 2, 6,13,12,11,10,9,15,14) ;
	}

part 54249 : default dil16 {
	newattr "$comment" = "BCD to 7 Segment Decoder/Driver" ;
	newattr "$ttlout" = "OC" ;
	pin (bo,bi,lt,a0,a1,a2,a3,a,b,c,d,e,f,g) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (bo,bi,lt,a0,a1,a2,a3, a, b, c, d,e, f, g)
	  to ( 4, 5, 3, 7, 1, 2, 6,13,12,11,10,9,15,14) ;
	}

part 54251 : default dil16 {
	newattr "$comment" = "8 to 1 Data Selector/Multiplexer" ;
	newattr "$ttlout" = "TS" ;
	pin (/g,a,b,c,d0,d1,d2,d3,d4,d5,d6,d7,y,w) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/g, a, b,c,d0,d1,d2,d3,d4,d5,d6,d7,y,w)
	  to ( 7,11,10,9, 4, 3, 2, 1,15,14,13,12,5,6) ;
	}

part 54257 : default dil16 {
	newattr "$comment" = "Quad 2 to 1 Multiplexer noninverting" ;
	newattr "$ttlout" = "TS" ;
	pin (/g,ab,1a,1b,1y,2a,2b,2y,3a,3b,3y,4a,4b,4y) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/g,ab,1a,1b,1y,2a,2b,2y,3a,3b,3y,4a,4b,4y)
	  to (15, 1, 2, 3, 4, 5, 6, 7,11,10, 9,14,13,12) ;
	swap ( [ 15, 1,
	       ( 2, 3, 4),
	       ( 5, 6, 7),
	       (11,10, 9),
	       (14,13,12) ] ) ;
	}

part 54259 : default dil16 {
	newattr "$comment" = "8 Bit Addressable Set-Reset Latch" ;
	newattr "$ttlout" = "TP" ;
	pin (s0,s1,s2,/g,d,/clr,q0,q1,q2,q3,q4,q5,q6,q7) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (s0,s1,s2,/g, d,/clr,q0,q1,q2,q3,q4,q5,q6,q7)
	  to ( 1, 2, 3,14,13,  15, 4, 5, 6, 7, 9,10,11,12) ;
	}

part 54265 : mainpart dil16 {
	newattr "$comment" = "Quad Complementary Delay Gates" ;
	newattr "$ttlout" = "TP" ;
	pin (a,b,y,w) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat ( a, b,y, w)
	  to ( 4, 5,7, 6)
	  or (11,12,9,10) ;
	swap ( (( 4, 5), 7, 6), ((11,12), 9,10) ) ;
	}

part 54265x : subpart 54265 {
	pin (a,y,w) ;
	xlat ( a, y, w)
	  to ( 1, 3, 2)
	  or (15,13,14) ;
	swap ( ( 1, 3, 2), (15,13,14) ) ;
	}

part 54273 : default dil20 {
	newattr "$comment" = "Octal D-Flip-Flop" ;
	newattr "$ttlout" = "TP" ;
	pin (/clr,clk,1d,1q,2d,2q,3d,3q,4d,4q,5d,5q,6d,6q,7d,7q,8d,8q) ;
	net "vss" : (10) ;
	net "vcc" : (20) ;
	xlat (/clr,clk,1d,1q,2d,2q,3d,3q,4d,4q,5d,5q,6d,6q,7d,7q,8d,8q)
	  to (   1, 11, 3, 2, 4, 5, 7, 6, 8, 9,13,12,14,15,17,16,18,19) ;
	swap ( [  1,11,
	       ( 3, 2),
	       ( 4, 5),
	       ( 7, 6),
	       ( 8, 9),
	       (13,12),
	       (14,15),
	       (17,16),
	       (18,19) ] ) ;
	}

part 54283 : default dil16 {
	newattr "$comment" = "4 Bit Full Adder, Fast Carry" ;
	newattr "$ttlout" = "TP" ;
	pin (a1,a2,a3,a4,b1,b2,b3,b4,c0,s1,s2,s3,s4,c4) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (a1,a2,a3,a4,b1,b2,b3,b4,c0,s1,s2,s3,s4,c4)
	  to ( 5, 3,14,12, 6, 2,15,11, 7, 4, 1,13,10, 9) ;
	swap internal ( (( 5, 6),( 3, 2),(14,15),(12,11)) ) ;
	}

part 54284 : default dil16 {
	newattr "$comment" = "4 by 4 Bit Parallel Binary Multiplier" ;
	pin (1a,1b,1c,1d,2a,2b,2c,2d,ga,gb,y4,y5,y6,y7) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (1a,1b,1c,1d,2a,2b,2c,2d,ga,gb,y4,y5,y6,y7)
	  to ( 5, 6, 7, 4, 3, 2, 1,15,14,13,12,11,10, 9) ;
	swap internal ( ( 5, 6, 7, 4), ( 3, 2, 1,15) ) ;
	swap internal ( ((14,13)) ) ;
	}

part 54285 : default dil16 {
	newattr "$comment" = "4 by 4 Bit Parallel Binary Multiplier" ;
	newattr "$ttlout" = "OC" ;
	pin (1a,1b,1c,1d,2a,2b,2c,2d,ga,gb,y0,y1,y2,y3) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (1a,1b,1c,1d,2a,2b,2c,2d,ga,gb,y0,y1,y2,y3)
	  to ( 5, 6, 7, 4, 3, 2, 1,15,14,13,12,11,10, 9) ;
	swap internal ( ( 5, 6, 7, 4), ( 3, 2, 1,15) ) ;
	swap internal ( ((14,13)) ) ;
	}

part 54290 : default dil14 {
	newattr "$comment" = "Decade Counter" ;
	newattr "$ttlout" = "TP" ;
	pin (r01,r02,r91,r92,a,qa,b,qb,qc,qd) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (r01,r02,r91,r92, a,qa, b,qb,qc,qd)
	  to ( 12, 13,  1,  3,10, 9,11, 5, 4, 8) ;
	swap internal ( ((12,13)) ) ;
	swap internal ( (( 1, 3)) ) ;
	}

part 54293 : default dil14 {
	newattr "$comment" = "4 Bit Binary Counter" ;
	newattr "$ttlout" = "TP" ;
	pin (r01,r02,a,qa,b,qb,qc,qd) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (r01,r02, a,qa, b,qb,qc,qd)
	  to ( 12, 13,10, 9,11, 5, 4, 8) ;
	swap internal ( ((12,13)) ) ;
	}

part 54298 : default dil16 {
	newattr "$comment" = "Quad 2 to 1 Multiplexer, Storage" ;
	newattr "$ttlout" = "TP" ;
	pin (ws,clk,a1,a2,qa,b1,b2,qb,c1,c2,qc,d1,d2,qd) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (ws,clk,a1,a2,qa,b1,b2,qb,c1,c2,qc,d1,d2,qd)
	  to (10, 11, 3, 2,15, 4, 1,14, 9, 5,13, 7, 6,12) ;
	swap ( [ 10,11,
	       ( 3, 2,15),
	       ( 4, 1,14),
	       ( 9, 5,13),
	       ( 7, 6,12) ] ) ;
	}

part 54351 : default dil20 {
	newattr "$comment" = "Dual Data Selector/Multiplexer" ;
	newattr "$ttlout" = "TS" ;
	pin (a,b,c,/g,1d0,1d1,1d2,1d3,d4,d5,d6,d7,1y,2d0,2d1,2d2,2d3,2y) ;
	net "vss" : (10) ;
	net "vcc" : (20) ;
	xlat (a,b,c,/g,1d0,1d1,1d2,1d3,d4,d5,d6,d7,1y,2d0,2d1,2d2,2d3,2y)
	  to (3,4,5, 2,  6,  7,  8,  9,14,13,12,11, 1, 18, 17, 16, 15,19) ;
	}

part 54365 : default dil16 {
	newattr "$comment" = "Hex Buffer W/Common Enable" ;
	newattr "$ttlout" = "TS" ;
	pin (/g1,/g2,a1,y1,a2,y2,a3,y3,a4,y4,a5,y5,a6,y6) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/g1,/g2,a1,y1,a2,y2,a3,y3,a4,y4,a5,y5,a6,y6)
	  to (  1, 15, 2, 3, 4, 5, 6, 7,10, 9,12,11,14,13) ;
	swap internal ( ( 2, 3),
	                ( 4, 5),
	                ( 6, 7),
	                (10, 9),
	                (12,11),
	                (14,13) ) ;
	swap internal ( (( 1,15)) ) ;
	}

part 54366 : default dil16 {
	newattr "$comment" = "Hex Inverter W/Common Enable" ;
	newattr "$ttlout" = "TS" ;
	pin (/g1,/g2,a1,y1,a2,y2,a3,y3,a4,y4,a5,y5,a6,y6) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/g1,/g2,a1,y1,a2,y2,a3,y3,a4,y4,a5,y5,a6,y6)
	  to (  1, 15, 2, 3, 4, 5, 6, 7,10, 9,12,11,14,13) ;
	swap internal ( ( 2, 3),
	                ( 4, 5),
	                ( 6, 7),
	                (10, 9),
	                (12,11),
	                (14,13) ) ;
	swap internal ( (( 1,15)) ) ;
	}

part 54367 : default dil16 {
	newattr "$comment" = "Hex Buffer 4 Bit and 2 Bit" ;
	newattr "$ttlout" = "TS" ;
	pin (/1g,1a1,1y1,1a2,1y2,1a3,1y3,1a4,1y4,/2g,2a1,2y1,2a2,2y2) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/1g,1a1,1y1,1a2,1y2,1a3,1y3,1a4,1y4)
	  to (  1,  2,  3,  4,  5,  6,  7, 10,  9) ;
	xlat (/2g,2a1,2y1,2a2,2y2)
	  to ( 15, 12, 11, 14, 13) ;
	swap internal ( [  1, ( 2, 3), ( 4, 5), ( 6, 7), (10, 9) ] ) ;
	swap internal ( [ 15, (12,11), (14,13) ] ) ;
	}

part 54368 : default dil16 {
	newattr "$comment" = "Hex Inverter 4 Bit and 2 Bit" ;
	newattr "$ttlout" = "TS" ;
	pin (/1g,1a1,1y1,1a2,1y2,1a3,1y3,1a4,1y4,/2g,2a1,2y1,2a2,2y2) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/1g,1a1,1y1,1a2,1y2,1a3,1y3,1a4,1y4)
	  to (  1,  2,  3,  4,  5,  6,  7, 10,  9) ;
	xlat (/2g,2a1,2y1,2a2,2y2)
	  to ( 15, 12, 11, 14, 13) ;
	swap internal ( [  1, ( 2, 3), ( 4, 5), ( 6, 7), (10, 9) ] ) ;
	swap internal ( [ 15, (12,11), (14,13) ] ) ;
	}

part 54376 : default dil16 {
	newattr "$comment" = "Quad J-K Flip-Flop" ;
	newattr "$ttlout" = "TP" ;
	pin (/clr,clk,j1,/k1,q1,j2,/k2,q2,j3,/k3,q3,j4,/k4,q4) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/clr,clk,j1,/k1,q1,j2,/k2,q2,j3,/k3,q3,j4,/k4,q4)
	  to (   1,  9, 2,  3, 4, 7,  6, 5,10, 11,12,15, 14,13) ;
	swap ( [  1, 9,
	       ( 2, 3, 4),
	       ( 7, 6, 5),
	       (10,11,12),
	       (15,14,13) ] ) ;
	}

part 54390 : default dil16 {
	newattr "$comment" = "Dual 4 Bit Decade and Binary Counter" ;
	newattr "$ttlout" = "TP" ;
	pin (/clr,a,qa,b,qb,qc,qd) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (/clr, a,qa, b,qb,qc,qd)
	  to (   2, 1, 3, 4, 5, 6, 7)
	  or (  14,15,13,12,11,10, 9) ;
	swap ( [  2, 1, 3, 4, 5, 6, 7 ],
	       [ 14,15,13,12,11,10, 9 ] ) ;
	}

part 54393 : default dil14 {
	newattr "$comment" = "Dual 4 Bit Decade and Binary Counter" ;
	newattr "$ttlout" = "TP" ;
	pin (clr,a,qa,qb,qc,qd) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat (clr, a,qa,qb,qc,qd)
	  to (  2, 1, 3, 4, 5, 6)
	  or ( 12,13,11,10, 9, 8) ;
	swap ( ( 2, 1, 3, 4, 5, 6), (12,13,11,10, 9, 8) ) ;
	}

part 54425 : default dil14 {
	newattr "$comment" = "Quad Gate Active Low Enable" ;
	newattr "$ttlout" = "TS" ;
	pin (c,a,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( c, a, y)
	  to ( 1, 2, 3)
	  or ( 4, 5, 6)
	  or (10, 9, 8)
	  or (13,12,11) ;
	swap ( ( 1, 2, 3), ( 4, 5, 6), (10, 9, 8), (13,12,11) ) ;
	}

part 54426 : default dil14 {
	newattr "$comment" = "Octal Buffer Gate Enable noninv" ;
	pin (c,a,y) ;
	net "vss" : (7) ;
	net "vcc" : (14) ;
	xlat ( c, a, y)
	  to ( 1, 2, 3)
	  or ( 4, 5, 6)
	  or (10, 9, 8)
	  or (13,12,11) ;
	swap ( ( 1, 2, 3), ( 4, 5, 6), (10, 9, 8), (13,12,11) ) ;
	}

part 54490 : default dil16 {
	newattr "$comment" = "Dual 4 Bit Decade Counter" ;
	newattr "$ttlout" = "TP" ;
	pin (clr,set,/clk,qa,qb,qc,qd) ;
	net "vss" : (8) ;
	net "vcc" : (16) ;
	xlat (clr,set,/clk,qa,qb,qc,qd)
	  to (  2,  4,   1, 3, 5, 6, 7)
	  or ( 14, 12,  15,13,11,10, 9) ;
	swap ( [  2, 4, 1, 3, 5, 6, 7 ],
	       [ 14,12,15,13,11,10, 9 ] ) ;
	}

part 54612 : default dil40 {
	newattr "$comment" = "Memory Mapper, Output Latch" ;
	newattr "$ttlout" = "TS" ;
	pin (/cs,/me,/mm,"r/w",rs0,rs1,rs2,rs3,/stb,ma0,ma1,ma2,ma3,mo0,mo1,
	     mo2,mo3,mo4,mo5,mo6,mo7,mo8,mo9,mo10,mo11,d0,d1,d2,d3,d4,d5,
	     d6,d7,d8,d9,d10,d11) ;
	net "vss" : (20) ;
	net "vcc" : (40) ;
	xlat (/cs,/me,/mm,"r/w",rs0,rs1,rs2,rs3,/stb,ma0,ma1,ma2,ma3,mo0,
	      mo1,mo2,mo3,mo4,mo5,mo6,mo7,mo8,mo9,mo10,mo11,d0,d1,d2,d3,d4,
	      d5,d6,d7,d8,d9,d10,d11)
	  to (  4, 21, 13,    6, 36, 38,  1,  3,   5, 35, 37, 39,  2, 14,
	       15, 16, 17, 18, 19, 22, 23, 24, 25,  26,  27, 7, 8, 9,10,11,
	      12,29,30,31,32, 33, 34) ;
	}

/*___________________________________________________________*/
/* Logical Library definition file end */

end.