loglib

/*______________________________________________________________*/
/*								*/
/* LOG Library	: att.def					*/
/* SCM Library	: att.ddb					*/
/*								*/
/* Author	: Bartels System				*/
/* Last Revision: 97/04/15					*/
/*______________________________________________________________*/
/*								*/
/* This library includes circuit families manufactured by	*/
/* AT&T (ATT) such as						*/
/*								*/
/*	- Digital Signal Processors				*/
/*								*/
/* NOTE:							*/
/*								*/
/* The part names used in this library DO include the AT&T	*/
/* specific prefix (e.g., DSP) but do NOT include suffixes	*/
/* referring to temperature range, timing constraints, plastic	*/
/* or ceramic DIL packages (as long as pin compatibility is	*/
/* maintained).							*/
/*______________________________________________________________*/

/* AT&T  WE-DSP16 Digital Signal Processor */

part dsp16 : plcc84 {
	newattr "$comment" = "DSP" ;
	newattr "$type" = "DSP16" ;
	newattr "$manufacturer" = "AT&T";
	pin ( cki, cko,  di,  do,doen, exm,iack, ibf, ick, ild,
	      int, ock, old, ose,pids,pods,psel,rstb,sadd,sync) ;
	net "vdd" : (1,6,17,28,41,55,70,79) ;
	net "vss" : (7,16,21,27,54,65,69,80) ;
	bus (abbus) ;
	xlat ( abbus.a0, abbus.a1, abbus.a2, abbus.a3,
	       abbus.a4, abbus.a5, abbus.a6, abbus.a7,
	       abbus.a8, abbus.a9,abbus.a10,abbus.a11,
	      abbus.a12,abbus.a13,abbus.a14,abbus.a15)
	  to (       32,       31,       30,       29,
	             26,       25,       24,       23,
	             22,       20,       19,       18,
	             15,       14,       13,       12) ;
	bus (pbbus) ;
	xlat ( pbbus.a0, pbbus.a1, pbbus.a2, pbbus.a3,
	       pbbus.a4, pbbus.a5, pbbus.a6, pbbus.a7,
	       pbbus.a8, pbbus.a9,pbbus.a10,pbbus.a11,
	      pbbus.a12,pbbus.a13,pbbus.a14,pbbus.a15)
	  to (       11,       10,        9,        8,
	              5,        4,        3,        2,
	             84,       83,       82,       81,
	             78,       77,       76,       75) ;
	bus (rbbus) ;
	xlat ( rbbus.a0, rbbus.a1, rbbus.a2, rbbus.a3,
	       rbbus.a4, rbbus.a5, rbbus.a6, rbbus.a7,
	       rbbus.a8, rbbus.a9,rbbus.a10,rbbus.a11,
	      rbbus.a12,rbbus.a13,rbbus.a14,rbbus.a15)
	  to (       35,       36,       37,       38,
	             39,       40,       42,       43,
	             44,       45,       46,       47,
	             48,       49,       50,       51) ;
	xlat ( cki, cko,  di,  do,doen, exm,iack, ibf, ick, ild,
	       int, ock, old, ose,pids,pods,psel,rstb,sadd,sync)
	  to (  67,  33,  56,  61,  64,  34,  68,  53,  58,  57,
	        71,  59,  60,  52,  73,  74,  72,  66,  63,  62) ;
	}

/* AT&T  WE-DSP32 Digital Signal Processor */
/* Standard DIL package */

part dsp32 : default dil40 {
	newattr "$comment" = "DSP (DIL Package)" ;
	newattr "$commentge" = "DSP (DIL-Gehaeuse)" ;
	newattr "$type" = "DSP32" ;
	newattr "$manufacturer" = "AT&T";
	pin (cko,cki, /zn,mmd0,mmd1,/pwn,/restn,pint, pdf, ock, obe,do,
	     old,ose,/oen,  sy, ild, ibf,   ick,  di,pack,/pen,/pgn) ;
	net "vdd" : (38,39,40) ;
	net "vss" : (1,2,3) ;
	bus (pdbbus) ;
	xlat (pdbbus.pd0,pdbbus.pd1,pdbbus.pd2,pdbbus.pd3,
	      pdbbus.pd4,pdbbus.pd5,pdbbus.pd6,pdbbus.pd7)
	  to (        11,        12,        13,        14,
	              15,        16,        17,        18) ;
	bus (pabbus) ;
	xlat (pabbus.pa0,pabbus.pa1,pabbus.pa2)
	  to (        36,        35,        37) ;
	xlat (cko,cki, /zn,mmd0,mmd1,/pwn,/restn,pint, pdf, ock, obe,do,
	      old,ose,/oen,  sy, ild, ibf,   ick,  di,pack,/pen,/pgn)
	  to (  4,  5,   6,   7,   8,   9,    10,  19,  20,  21,  22,23,
	       24, 25,  26,  27,  28,  29,    30,  31,  32,  33,  34) ;
	}

/* AT&T  WE-DSP32 Digital Signal Processor */
/* Alternative 100 pin rectangular PGA package (PGA100r) */

part dsp32pga : pga100r {
	newattr "$comment" = "DSP (PGA Package)" ;
	newattr "$commentge" = "DSP (PGA-Gehaeuse)" ;
	newattr "$type" = "DSP32" ;
	newattr "$manufacturer" = "AT&T";
	pin (mmd0,mmd1,/mgn,/mwn,/msn0,/msn1,/msn2,/msn3,
	     pack, pen, pgn, pwn, pint,  pdf,   di,  ibf,
	      ick, ild,  do, obe,  ock,  old,  ose,  oen,
	       sy, cki, cko,/restn,/zn) ;
	net "vss" : (a4,s4,a8,s8,j11) ;
	net "vdd" : (e11,n11) ;
	/* e1 and n1 for external memory interface only */
	/* (connect to VSS otherwise) */
	net "vdd" : (e1,n1) ;
	bus (abbus) ;
	xlat ( abbus.a0, abbus.a1, abbus.a2, abbus.a3,
	       abbus.a4, abbus.a5, abbus.a6, abbus.a7,
	       abbus.a8, abbus.a9,abbus.a10,abbus.a11,
	      abbus.a12,abbus.a13)
	  to (      d11,      d10,      c11,      c10,
	            b11,      b10,      a11,      a10,
	             d8,       d7,       c8,       c7,
	             b8,       b7) ;
	bus (dbbus) ;
	xlat ( dbbus.d0, dbbus.d1, dbbus.d2, dbbus.d3,
	       dbbus.d4, dbbus.d5, dbbus.d6, dbbus.d7,
	       dbbus.d8, dbbus.d9,dbbus.d10,dbbus.d11,
	      dbbus.d12,dbbus.d13,dbbus.d14,dbbus.d15,
	      dbbus.d16,dbbus.d17,dbbus.d18,dbbus.d19,
	      dbbus.d20,dbbus.d21,dbbus.d22,dbbus.d23,
	      dbbus.d24,dbbus.d25,dbbus.d26,dbbus.d27,
	      dbbus.d28,dbbus.d29,dbbus.d30,dbbus.d31)
	  to (       a1,       a2,       b1,       b2,
	             c1,       c2,       d1,       d2,
	             e2,       f1,       f2,       g1,
	             g2,       h1,       h2,       j1,
	             j2,       k1,       k2,       l1,
	             l2,       m1,       m2,       n2,
	             p1,       p2,       q1,       q2,
	             r1,       r2,       s1,       s2) ;
	bus (pdbbus) ;
	xlat (pdbbus.pd0,pdbbus.pd1,pdbbus.pd2,pdbbus.pd3,
	      pdbbus.pd4,pdbbus.pd5,pdbbus.pd6,pdbbus.pd7)
	  to (       p11,       q11,       q10,       r11,
	             r10,       s11,       s10,        r8) ;
	bus (pabbus) ;
	xlat (pabbus.pa0,pabbus.pa1,pabbus.pa2)
	  to (       l11,       l10,       k11) ;
	xlat (mmd0,mmd1,/mgn,/mwn,/msn0,/msn1,/msn2,/msn3,
	      pack, pen, pgn, pwn, pint,  pdf,   di,  ibf,
	       ick, ild,  do, obe,  ock,  old,  ose,  oen,
	        sy, cki, cko,/restn,/zn)
	  to ( f11, f10,  d4,  d5,   a7,   a5,   b5,   b4,
	       p10, n10, m11, m10,   q8,   p8,   p7,   q5,
	        r7,  q7,  q4,  p5,   s7,   s5,   r4,   p4,
	        r5, e10, h11,   g10,g11) ;
	}

/*______________________________________________________________*/
/* Logical Library definition file end */

end.